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参数资料
| 型号： | MAX17482GTL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 5/48页 |
| 文件大小： | 0K |
| 描述： | IC CTLR PWM DUAL IMVP-6.5 40TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 系列： | Quick-PWM™ |
| 应用： | 控制器，Intel IMVP-6，IMVP-6.5? |
| 输入电压： | 4.5 V ~ 5.5 V |
| 输出数： | 1 |
| 输出电压： | 0.013 V ~ 1.5 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（5x5） |
| 包装： | 带卷 (TR) |
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Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V IN = 10V, V CC = V DD = V SHDN = V PGDIN = V PSI = V ILIM = 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, V CSP1
= V CSN1 = V CSP2 = V CSN1 = 1.0000V, FB = FBAC, R FBAC = 3.57k Ω from FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
V SLOW = 5V; MAX17021: DPRSTP = GND; T A = 0°C to +85°C , unless otherwise noted. Typical values are at T A = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CLKEN , PWRGD, and
PHASEGD Transition
Blanking Time
t BLANK
Measured from the time when FB reaches the
target voltage (Note 2)
20
μs
(VID Transitions)
PHASEGD Transition
Blanking Time (Phase 2
Enable Transitions)
CLKEN Output Low Voltage
CLKEN Output High
Voltage
PWRGD, PHASEGD Output
Low Voltage
PWRGD, PHASEGD
Leakage Current
CSN1 Pulldown Resistance
in Shutdown
Number of DH2 pulses for which PHASEGD is
blanked after phase 2 is enabled
Low state, I SINK = 3mA
High state, I SOURCE = 3mA
Low state, I SINK = 3mA
High-impedance state, PWRGD, PHASEGD forced
to 5V, T A = +25°C
SHDN = 0, measured after soft-shutdown
completed (DL_ = low)
V3P3 -
0.4
32
10
0.4
0.4
1
Pulses
V
V
V
μA
V CC Undervoltage Lockout
(UVLO) Threshold
V UVLO(VCC)
Rising edge, 65mV typical hysteresis,
controller disabled below this level
4.05
4.27
4.48
V
THERMAL PROTECTION
VRHOT Trip Threshold
VRHOT Delay
VRHOT Output
On-Resistance
VRHOT Leakage Current
Measured at THRM as a percentage of V CC ,
falling edge, typical hysteresis = 75mV
THRM forced 25mV below the VRHOT trip
t VRHOT
threshold, falling edge
R ON( VRHOT ) Low state
High-impedance state, VRHOT forced to 5V,
T A = +25°C
29
30
10
2
31
10
1
%
μs
μA
THRM Input Leakage
Thermal-Shutdown Threshold
I THRM
T SHDN
V THRM = 0 to 5V, T A = +25°C
Typical hysteresis = 15°C
-0.1
160
+0.1
μA
°C
VALLEY CURRENT LIMIT, DROOP, AND CURRENT BALANCE
Current-Limit Threshold
Voltage (Positive)
V LIMIT
V CSP_ - V CSN_
V TIME - V ILIM = 100mV
V TIME - V ILIM = 500mV
7
45
10
50
13
55
mV
ILIM = V CC
20
22.5
25
Current-Limit Threshold
Voltage (Negative)
V LIMIT(NEG)
V CSP_ - V CSN_ , nominally -125% of V LIMIT
-4
+4
mV
Accuracy
Current-Limit Threshold
Voltage (Zero Crossing)
V ZERO
V GND - V LX_ , DPRSLPVR = 5V
1
mV
_______________________________________________________________________________________
5
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