参数资料
型号: MB89PV630C-SH
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 10 MHz, MICROCONTROLLER, CDIP64
封装: CERAMIC, MDIP-64
文件页数: 141/153页
文件大小: 7326K
代理商: MB89PV630C-SH
HARDWARE CONFIGURATION
2-65
[Bit 5] TDRE:
The TDRE flag is used to indicate the status of the serial output data register (SODR).
When data is written to the SODR register after reading the SSD register with the TDRE flag set to 1,
serial data is output from the SOUT pin.
When the TDRE flag is set to 1, a transmitter interrupt request is output.
[Bit 4] TIE: Transmitter interrupt request enable bit
Bit 4 is used to enable the transmitter interrupt request.
[Bit 3] RIE: Receiver interrupt request enable bit
Bit 3 is used to enable the receiver interrupt request.
[Bit 2] PSEL: Port select bit
Bit 2 is used to select the UART ports.
[Bit 1] TD8/TP
When parity is not provided, bit 1 is treated as bit 8 of the SODR register. When parity is provided, this
bit is used to determine whether the parity of serial output data is even or odd.
[Bit 0] RD8/RP:
When parity is not provided, bit 0 is treated as bit 8 of the SIDR register. When parity is provided, this bit
is used to determine whether the parity of serial input data is even or odd (default: undefined).
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