参数资料
型号: MB89PV630C-SH
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 10 MHz, MICROCONTROLLER, CDIP64
封装: CERAMIC, MDIP-64
文件页数: 152/153页
文件大小: 7326K
代理商: MB89PV630C-SH
HARDWARE CONFIGURATION
2-75
[Bit 4] SOE: Serial-data output-enable bit
Bit 4 is used to control the output pins for serial I/O.
When using P35/SI1 and P57/SI2 pins as the SI pin, always set the DDR to input (bit 3 of DDR3 = 0).
[Bits 3 and 2] CKS1 and CKS0: Shift-clock select bits
Bits 3 and 2 are used to select the serial shift-clock modes.
[Bit 1] BDS: Transfer direction select bit
At serial data transfer, Bit 1 is used to select whether data transfer is performed from the least significant
bit first (LSB first) or from the most significant bit first (MSB first).
Note that when this bit is rewritten after writing data to the SDR, the data become invalid.
[Bit 0] SST: Serial I/O transfer-start bit
Bit 0 is used to start serial I/O transfer. The bit is automatically cleared to 0 when transfer is terminated.
Before starting transfer, ensure that transfer is stopped (SST = 0).
(b) Serial-data register 1 (SDR1)
This 8-bit register is used to hold serial I/O transfer data. Do not write data to this register during the serial
I/O operation.
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