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参数资料
| 型号： | MB89PV630C-SH |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, 10 MHz, MICROCONTROLLER, CDIP64 |
| 封装： | CERAMIC, MDIP-64 |
| 文件页数： | 30/153页 |
| 文件大小： | 7326K |
| 代理商： | MB89PV630C-SH |
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MB89630 SERIES HARDWARE MANUAL
3-6
3.3 INTERRUPT
If the interrupt controller and CPU are ready to accept interrupts when an interrupt request is output from
the resources or by an external-interrupt input, the CPU temporarily suspends the currently-executing
instruction and executes the interrupt-processing program. Figure 3.3 shows the interrupt-processing flow-
chart.
Fig. 3.17 Interrupt-processing Flowchart
All interrupts are disabled after a reset is cleared. Therefore, initialize interrupts in the main program (1).
Each resource generating interrupts and the interrupt-level-setting registers (ILR1 - ILR3) in the interrupt
controller corresponding to these interrupts are to be initialized. The levels of all interrupts can be set by
the interrupt-level-setting registers (ILR1 - ILR3) in the interrupt controller. The interrupt level can be set
from 1 to 3, where 1 indicates the highest level, and 2 the second highest level. Level 3 indicates that no
interrupt occurs. The interrupt request of this level can be accepted. After initializing the resource regis-
ters, the main program exe cutes various controls (2). Interrupts are generated from the resources (3). The
highest-priority interrupt re quests are identified from those occurring at the same time by the interrupt con-
troller and are transferred to the CPU. The CPU then checks the current interrupt level and the status of
the I-flag (4), and starts the interrupt processing.
The CPU performs the interrupt processing to save the contents of the current PC and PS in the stack (5)
and fetches the entry addresses of the interrupt program from the interrupt vectors. After updating the IL
value in the PS to the required one, the CPU starts executing the interrupt-processing routine.
Clear the interrupt sources (6) and process the interrupts in the user's interrupt-processing routine. Finally,
restore the PC and PS values saved by the RETI instruction in the stack (8) to return to the interrupted
instruc tion.
Note: Unlike the F2MC-8, A and T are not saved in the stack at the interrupt time.
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相关代理商/技术参数 |
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| MB89PV640CF | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
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| MB89PV650ACF | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89PV670A | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
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