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参数资料
| 型号： | MB9AF312NPMC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封装： | 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 69/114页 |
| 文件大小： | 1357K |
| 代理商： | MB9AF312NPMC |
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ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
58
12.4
Register Description
12.4.1 Moving Interrupts Between Application and Boot Space, Atmel ATmega88PA, ATmega168PA
The MCU control register controls the placement of the interrupt vector table.
MCUCR – MCU control register
Note:
BODS and BODSE only available for picoPower devices ATmega48PA/88PA/168PA
Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the interrupt vectors are placed at the start of the flash memory. When this bit is set
(one), the interrupt vectors are moved to the beginning of the boot loader section of the flash. The actual address of the start
of the boot flash section is determined by the BOOTSZ Fuses. Refer to the
Section 27. “Boot Loader Support – Read-While-Write Self-Programming” on page 237 for details. To avoid unintentional
changes of interrupt vector tables, a special write procedure must be followed to change the IVSEL bit:
a.
Write the interrupt vector change enable (IVCE) bit to one.
b.
Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled in the cycle IVCE is set, and
they remain disabled until after the instruction following the write to IVSEL. If IVSEL is not written, interrupts remain disabled
for four cycles. The I-bit in the status register is unaffected by the automatic disabling.
Note:
If interrupt vectors are placed in the boot loader section and boot lock bit BLB02 is programmed, interrupts are
disabled while executing from the application section. If interrupt vectors are placed in the application section
and boot lock bit BLB12 is programed, interrupts are disabled while executing from the boot loader section.
Refer to the Section 27. “Boot Loader Support – Read-While-Write Self-Programming” on page 237 for details
on boot lock bits.
Bit 0 – IVCE: Interrupt Vector Change Enable
The IVCE bit must be written to logic one to enable change of the IVSEL bit. IVCE is cleared by hardware four cycles after it
is written or when IVSEL is written. Setting the IVCE bit will disable interrupts, as explained in the IVSEL description above.
See code example below.
Bit
7
6
5
43210
–
BODS(1) BODSE(1)
PUD
–
IVSEL
IVCE
MCUCR
Read/Write
R
R/W
R
R/W
Initial Value
0
00000
Assembly Code Example
Move_interrupts:
; Enable change of Interrupt Vectors
ldi
r16, (1<<IVCE)
out
MCUCR, r16
; Move interrupts to Boot Flash section
ldi
r16, (1<<IVSEL)
out
MCUCR, r16
ret
C Code Example
void
Move_interrupts(void)
{
/* Enable change of Interrupt Vectors */
MCUCR = (1<<IVCE);
/* Move interrupts to Boot Flash section */
MCUCR = (1<<IVSEL);
}
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