- 您现在的位置：买卖IC网 > PDF目录80585 > MB9AF312NPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100 PDF资料下载
参数资料
| 型号： | MB9AF312NPMC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封装： | 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 85/114页 |
| 文件大小： | 1357K |
| 代理商： | MB9AF312NPMC |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页当前第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
72
SCK/PCINT5 – Port B, Bit 5
SCK: Master clock output, slave clock input pin for SPI channel. When the SPI is enabled as a slave, this pin is configured as
an input regardless of the setting of DDB5. When the SPI is enabled as a master, the data direction of this pin is controlled
by DDB5. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB5 bit.
PCINT5: Pin change interrupt source 5. The PB5 pin can serve as an external interrupt source.
MISO/PCINT4 – Port B, Bit 4
MISO: Master data input, slave data output pin for SPI channel. When the SPI is enabled as a master, this pin is configured
as an input regardless of the setting of DDB4. When the SPI is enabled as a slave, the data direction of this pin is controlled
by DDB4. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB4 bit.
PCINT4: Pin change interrupt source 4. The PB4 pin can serve as an external interrupt source.
MOSI/OC2/PCINT3 – Port B, Bit 3
MOSI: SPI master data output, slave data input for SPI channel. When the SPI is enabled as a slave, this pin is configured
as an input regardless of the setting of DDB3. When the SPI is enabled as a master, the data direction of this pin is
controlled by DDB3. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB3 bit.
OC2, output compare match output: The PB3 pin can serve as an external output for the Timer/Counter2 compare match.
The PB3 pin has to be configured as an output (DDB3 set (one)) to serve this function. The OC2 pin is also the output pin for
the PWM mode timer function.
PCINT3: Pin Change interrupt source 3. The PB3 pin can serve as an external interrupt source.
SS/OC1B/PCINT2 – Port B, Bit 2
SS: Slave select input. When the SPI is enabled as a slave, this pin is configured as an input regardless of the setting of
DDB2. As a slave, the SPI is activated when this pin is driven low. When the SPI is enabled as a master, the data direction
of this pin is controlled by DDB2. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the
PORTB2 bit.
OC1B, output compare match output: The PB2 pin can serve as an external output for the Timer/Counter1 compare match
B. The PB2 pin has to be configured as an output (DDB2 set (one)) to serve this function. The OC1B pin is also the output
pin for the PWM mode timer function.
PCINT2: Pin change interrupt source 2. The PB2 pin can serve as an external interrupt source.
OC1A/PCINT1 – Port B, Bit 1
OC1A, output compare match output: The PB1 pin can serve as an external output for the Timer/Counter1 compare match
A. The PB1 pin has to be configured as an output (DDB1 set (one)) to serve this function. The OC1A pin is also the output
pin for the PWM mode timer function.
PCINT1: Pin change interrupt source 1. The PB1 pin can serve as an external interrupt source.
ICP1/CLKO/PCINT0 – Port B, Bit 0
ICP1, input capture pin: The PB0 pin can act as an input capture pin for Timer/Counter1.
CLKO, divided system clock: The divided system clock can be output on the PB0 pin. The divided system clock will be output
if the CKOUT fuse is programmed, regardless of the PORTB0 and DDB0 settings. It will also be output during reset.
PCINT0: Pin change interrupt source 0. The PB0 pin can serve as an external interrupt source.
相关PDF资料 |
PDF描述 |
|---|---|
| MB9AF315NPF | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100 |
| MSM65P514-JS | 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PQCC68 |
| MSM67P620-JS | 16-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQCC68 |
| MSM80C154-RS | 8-BIT, 12 MHz, MICROCONTROLLER, PDIP40 |
| MSM83C154-RS | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP40 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MB9AF314LAPMC1-G-JNE2 | 制造商:FUJITSU 功能描述: |
| MB9AF314LAPMC-G-JNE2 | 制造商:Fujitsu 功能描述:Bulk |
| MB9AF314LAQN-G-AVE2 | 功能描述:ARM? Cortex?-M3 FM3 MB9A310A Microcontroller IC 32-Bit 40MHz 256KB (256K x 8) FLASH 64-QFN Exposed Pad (9x9) 制造商:cypress semiconductor corp 系列:FM3 MB9A310A 包装:托盘 零件状态:有效 核心处理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:40MHz 连接性:CSIO，I2C，LIN，UART/USART，USB 外设:DMA，LVD，POR，PWM，WDT I/O 数:51 程序存储容量:256KB（256K x 8） 程序存储器类型:闪存 EEPROM 容量:- RAM 容量:32K x 8 电压 - 电源（Vcc/Vdd）:2.7 V ~ 5.5 V 数据转换器:A/D 9x12b 振荡器类型:内部 工作温度:-40°C ~ 105°C（TA） 封装/外壳:64-VFQFN 裸露焊盘 供应商器件封装:64-QFN 裸露焊盘（9x9） 标准包装:260 |
| MB9AF314LPMC1-ESE1 | 制造商:FUJITSU 功能描述: |
| MB9AF314LPMC1-GE1 | 制造商:FUJITSU 功能描述: |
发布紧急采购，3分钟左右您将得到回复。