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参数资料
| 型号： | MB9AF314NBGL |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PBGA112 |
| 封装： | 0.80 MM PITCH, PLASTIC, FBGA-112 |
| 文件页数： | 79/114页 |
| 文件大小： | 1357K |
| 代理商： | MB9AF314NBGL |
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67
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
When reading back a software assigned pin value, a nope instruction must be inserted as indicated in Figure 14-4. The out
instruction sets the “SYNC LATCH” signal at the positive edge of the clock. In this case, the delay tpd through the
synchronizer is 1 system clock period.
Figure 14-4. Synchronization when Reading a Software Assigned Pin Value
The following code example shows how to set port B pins 0 and 1 high, 2 and 3 low, and define the port pins from 4 to 7 as
input with pull-ups assigned to port pins 6 and 7. The resulting pin values are read back again, but as previously discussed,
a nope instruction is included to be able to read back the value recently assigned to some of the pins.
Assembly Code Example(1)
...
; Define pull-ups and set outputs high
; Define directions for port pins
ldi
r16,(1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0)
ldi
r17,(1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0)
out
PORTB,r16
out
DDRB,r17
; Insert nop for synchronization
nop
; Read port pins
in
r16,PINB
...
C Code Example
unsigned char
i;
...
/* Define pull-ups and set outputs high */
/* Define directions for port pins */
PORTB = (1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0);
DDRB = (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0);
/* Insert nop for synchronization*/
__no_operation();
/* Read port pins */
i = PINB;
...
Note:
1.
For the assembly program, two temporary registers are used to minimize the time from pull-ups are set on
pins 0, 1, 6, and 7, until the direction bits are correctly set, defining bit 2 and 3 as low and redefining bits 0
and 1 as strong high drivers.
SYSTEM CLK
INSTRUCTIONS
SYNC LATCH
PINxn
r16
r17
out PORTx, r16
nop
0x00
0xFF
in r17, PINx
t
pd
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相关代理商/技术参数 |
参数描述 |
|---|---|
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| MB9AF314NPMC-GE1 | 制造商:FUJITSU 功能描述: |
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