参数资料
型号: MC10XS3412DPNA
厂商: Freescale Semiconductor
文件页数: 24/55页
文件大小: 0K
描述: IC SWITCH HIGH SIDE QUAD 24QFN
标准包装: 168
类型: 高端开关
输出数: 4
Rds(开): 2 x 10 毫欧,2 x 12 毫欧
内部开关:
电流限制: 5A
输入电压: 4 V ~ 28 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-PowerQFN
供应商设备封装: 24-PQFN(12x12)
包装: 托盘
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
POSITIVE POWER SUPPLY (VPWR)
This pin connects to the positive power supply and is the
source of operational power for the device. The VPWR
contact is the backside surface mount tab of the package.
SERIAL OUTPUT (SO)
The SO data pin is a tri-stateable output from the shift
register. The SO pin remains in a high-impedance state until
the CS pin is put into a logic [0] state. The SO data is capable
of reporting the status of the output, the device configuration,
the state of the key inputs, etc. The SO pin changes state on
the rising edge of SCLK and reads out on the falling edge of
SCLK. SO reporting descriptions are provided in Table 23 .
HIGH SIDE OUTPUTS (HS3, HS1, HS0, HS2)
Protected 10 m ? and 12 m ? high side power outputs to
the load.
FAIL SAFE INPUT (FSI)
This pin incorporates an active internal pull-up current
source from internal supply (V REG ). This enables the
watchdog timeout feature.
When the FSI pin is opened, the watchdog circuit is
enabled. After a Watchdog timeout occurs, the output states
depends on IN[0:3].
When the FSI pin is connected to GND, the watchdog
circuit is disabled. The output states depends on IN[0:3] in
case of V DD Failure condition, in case V DD failure detection is
activated (VDD_FAIL_en bit sets to logic [1]).
10XS3412
Analog Integrated Circuit Device Data ?
24
Freescale Semiconductor
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