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| 型号： | MC33910G5AC |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 84/90页 |
| 文件大小： | 0K |
| 描述： | IC SYSTEM BASIS CHIP 32LQFP |
| 标准包装： | 250 |
| 应用： | 系统基础芯片 |
| 电流 - 电源： | 4.5mA |
| 电源电压： | 5.5 V ~ 27 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 托盘 |
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MC33910BAC / MC34910BAC
FUNCTIONAL DEVICE OPERATIONS
LOGIC COMMANDS AND REGISTERS
MXx - Analog Multiplexer Input Select
These write-only bits selects which analog input is
When disabled or when in Stop or Sleep mode, the output
Writing to the interrupt mask register (IMR) will return the
ISR.
Table 56. Interrupt Mask Register - $E
buffer is not powered and the ADOUT0 output is left floating
C3
C2
C1
C0
to achieve lower current consumption.
Table 54. Analog Multiplexer Channel Select
MX2
MX1
MX0
Meaning
Write
Reset Value
HSM
1
-.
1
LINM
1
VMM
1
0
0
0
Disabled
Reset Condition
POR
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
Reserved
Die Temperature Sensor
VSENSE input
L1 input
Reserved
Reserved
Reserved
HSM - High Side Interrupt Mask
This write-only bit enables/disables interrupts generated in
the high side block.
1 = HS Interrupts Enabled
0 = HS Interrupts Disabled
LINM - LIN Interrupts Mask
This write-only bit enables/disables interrupts generated in
Configuration Register - CFR
This register controls the cyclic sense timing multiplier.
the LIN block.
1 = LIN Interrupts Enabled
0 = LIN Interrupts Disabled
Table 55. Configuration Register - $D
C3 C2 C1
C0
VMM - Voltage Monitor Interrupt Mask
This write-only bit enables/disables interrupts generated in
Write
Reset
Value
Reset
Condition
0
0
POR, Reset
mode or
ext_reset
CYSX8
0
POR
0
0
POR
0
0
POR
the voltage monitor block. The only maskable interrupt in the
voltage monitor block is the V SUP over-voltage interrupt.
1 = Interrupts Enabled
0 = Interrupts Disabled
Interrupt Source Register - ISR
This register allows the MCU to determine the source of
HVDD - Hall Sensor Supply Enable
This write-only bit enables/disables the state of the hall
sensor supply.
1 = HVDD on
0 = HVDD off
CYSX8 - Cyclic Sense Timing x 8
This write-only bit influences the Cyclic Sense period as
the last interrupt or wake-up respectively. A read of the
register acknowledges the interrupt and leads IRQ pin to
high, in case there are no other pending interrupts. If there
are pending interrupts, IRQ will be driven high for 10μs and
then be driven low again.
This register is also returned when writing to the interrupt
mask register (IMR).
Table 57. Interrupt Source Register - $E/$F
1 = Multiplier enabled
S3
S2
S1
S0
0 = None
Read
ISR3
ISR2
ISR1
ISR0
Interrupt Mask Register - IMR
This register allow to mask some of interrupt sources. The
respective flags within the ISR will continue to work but will
not generate interrupts to the MCU. The 5.0 V Regulator
over-temperature prewarning interrupt and under-voltage
(VSUV) interrupts can not be masked and will always cause
ISRx - Interrupt Source Register
These read-only bits indicate the interrupt source following
In case more than one interrupt is pending, than the
interrupt sources are handled sequentially multiplex.
an interrupt.
33910
Analog Integrated Circuit Device Data
Freescale Semiconductor
84
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| MC33910G5ACR2 | 功能描述:LIN 收发器 SBC LIN 2.5G Low end RoHS:否 制造商:NXP Semiconductors 工作电源电压: 电源电流: 最大工作温度: 封装 / 箱体:SO-8 |
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| MC33911BACR2 | 功能描述:LIN 收发器 SBC LIN2G MEDIUM END RoHS:否 制造商:NXP Semiconductors 工作电源电压: 电源电流: 最大工作温度: 封装 / 箱体:SO-8 |
| MC33911G5AC | 功能描述:LIN 收发器 SBC LIN 2.5G Medium end RoHS:否 制造商:NXP Semiconductors 工作电源电压: 电源电流: 最大工作温度: 封装 / 箱体:SO-8 |
| MC33911G5ACR2 | 功能描述:LIN 收发器 SBC LIN 2.5G Medium end RoHS:否 制造商:NXP Semiconductors 工作电源电压: 电源电流: 最大工作温度: 封装 / 箱体:SO-8 |
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