参数资料
型号: MC34703PNB
厂商: Freescale Semiconductor
文件页数: 33/46页
文件大小: 0K
描述: IC POWER SUPPLY QUICC 33-QFN
标准包装: 1
应用: 电源
电流 - 电源: 60mA
电源电压: 2.8 V ~ 13.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 33-PowerQFN
供应商设备封装: 33-PQFN(10x10)
包装: 管件
TYPICAL APPLICATIONS
R s = ----------------
When the LDO output current (Channel 3) reaches and
exceeds limit, Reset Pin (Channel 1) is pulled down
immediately. Channel 2 is LDO output voltage (3.3 V);
Channel 4 is Buck output voltage (1.8 V).
The current limit of the LDO can be set by using the
following formula:
45mV
I LIMIT
Power MOSFET Selecting
To keep the LDO working under stable operation, low input
capacitance is recommended for the external power
MOSFET. However, if input capacitance is too small, it may
lead the feedback loop into an unstable region. In this case,
a suggested MOSFET for the LDO, is IRL2703S or
NTD60N02R from On Semiconductor.
Layout Guidelines
To achieve a working power supply (regulator) design,
care must be taken in the PCB layout, not just the electrical
design. The PCB layout plays a critical role in the power
supply performance. A good PCB layout design will improve
regulation parameters and electromagnetic compatibility
(EMC) performance of switching power supply. In order to
avoid any inductive or capacitive coupling of the switching
power supply noise into the sensitive analog control circuits,
the noisy power ground and clean quiet signal ground should
be well separated on the PCB board, and connected only at
one point. The power routing should be made by heavy
traces or area of copper. The power path and its return
should be placed, if possible, on top of each other on different
layers or opposite sides of the PCB board.
The switching power supply input and output capacitors
should be physically placed very close to the power pins
(Vin2, SW, and PGND) of the 34703. Their ground pins,
together with the 34703 power ground pins (PGND), should
be connected by a single island of the power ground copper
to create the “single island” grounding.
The bootstrap capacitor should be tightly connected to the
integrated circuit as well. The same guidelines as those for
the layout of the main switching buck regulator should be
applied to the layout of the low power auxiliary boost
regulator and to some extent, the power path of the linear
regulator.
A four layer PCB is recommended for this product. It is
imperative to provide a V OUT (-) pin at the ground side of the
output capacitors, in order to ensure adequate load
regulation. The same is also true for LDO.
It is also recommended that the vias on the PCB used to
connect the second row of contacts (pins 13 to 21) on the IC,
have a hole diameter no larger than 0.009".
34703
Analog Integrated Circuit Device Data
Freescale Semiconductor
33
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