参数资料
| 型号： | MC34703PNB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 4/46页 |
| 文件大小： | 0K |
| 描述： | IC POWER SUPPLY QUICC 33-QFN |
| 标准包装： | 1 |
| 应用： | 电源 |
| 电流 - 电源： | 60mA |
| 电源电压： | 2.8 V ~ 13.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 33-PowerQFN |
| 供应商设备封装： | 33-PQFN（10x10） |
| 包装： | 管件 |
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PIN CONNECTIONS
Table 1. 34703 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on page 15 .
Pin Number
4
Pin Name
V IN1
Pin Function
Input
Formal Name
Input Voltage 1
Definition
The input supply pin for the integrated circuit. The internal circuits of the
IC are supplied through this pin.
5
6
SCL
FREQ
Input
Input
Serial Clock
Oscillator Frequency
I 2 C bus pin. Serial clock.
The switcher oscillator frequency can be adjusted by connecting an
external resistor R F to the FREQ pin. The default switching frequency
(FREQ pin left open or tied to V DDI ) is ~300 kHz.
7
8
ADDR
RESET
Input
Output
Address
Reset
I 2 C address selection. This pin can be either left open, tied to V DDI , or
grounded through a 10 k ? resistor.
The Reset pin indicates to the external circuitry when one of the
regulators protection features has been activated. Note, since it is an
open drain output it has to be pulled up to some supply voltage (e.g., the
output of the LDO) by an external resistor.
9
10
LCMP
ISNS
Input
Input
Linear Compensation
Current Sense
Linear regulator compensation pin.
Current sense pin of the LDO to provide overcurrent protection of the
linear regulator’s external power MOSFET. The voltage drop over the
LDO current sense resistor R S is sensed between the ISNS and the LDO
pins. The LDO current limit can be adjusted by selecting the proper value
of the current sense resistor R S .
11
LDO
Input
Linear Regulator
Input pin of the linear regulator power sequence and current limit control
circuits.
12
13
V BD
VBST
Output
Input
Boost Voltage Drain
Boost Voltage Sense
Drain of the internal boost regulator's switching power MOSFET.
Note, this pin must be connected to VBST (pin 1) and is not intended to
SENSE
provide power to external circuitry.
14
EN1
Input
Enable Pin 1
Enable 1 Input. The combination of the logic state of the Enable 1 and
Enable 2 inputs determine operation mode and type of power sequencing
of the IC.
15
16
SDA
CLKSYN
Input/Output
Input/Output
Serial Data
Clock Sync Input/
I 2 C bus pin. Serial data.
Oscillator synchronization input pin or oscillator output pin. The CLKSYN
Oscillator Output
pin can be configured either as an oscillator output when the CLKSEL pin
is left open or it can be used as a synchronization input when the CLKSEL
pin is grounded.
17
VDDI
Passive
Vdd Filter
Internal supply voltage capacitor pin. A ceramic low ESR 1.0 μ F capacitor
in parallel with a ceramic 100nF capacitor should be connected from this
pin to ground. The VDDI power supply voltage is for internal use only; do
not use externally.
18
19
GND
RT
Signal
Passive
Ground
Reset Timer
Analog ground of the IC.
This pin allows programming the Power-ON Reset delay by means of an
external RC network.
20
21
22
LDRV
LFB
VOUT
Output
Input
Output
LDO Gate Drive
LDO Feedback
Output Voltage Power
LDO gate drive of the external pass N-channel MOSFET.
Linear regulator feedback pin.
This pin must be directly connected to the output voltage of the buck
Sequencing Control
converter. This pin controls the buck regulators output voltage (Vout) in
accordance with the power sequencing control mode set by EN1 and
EN2.
23
24
INV
COMP
Input
Input
Error Amp
Switcher
Buck Controller Error Amplifier inverting input.
Buck converter compensation pin.
Compensation
34703
Analog Integrated Circuit Device Data
4
Freescale Semiconductor
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