- 您现在的位置：买卖IC网 > PDF目录45211 > MC68307PU16 (MOTOROLA INC) 16-BIT, 16.67 MHz, MICROCONTROLLER, PQFP100 PDF资料下载
参数资料
| 型号： | MC68307PU16 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, 16.67 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 80/264页 |
| 文件大小： | 949K |
| 代理商： | MC68307PU16 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页当前第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页第177页第178页第179页第180页第181页第182页第183页第184页第185页第186页第187页第188页第189页第190页第191页第192页第193页第194页第195页第196页第197页第198页第199页第200页第201页第202页第203页第204页第205页第206页第207页第208页第209页第210页第211页第212页第213页第214页第215页第216页第217页第218页第219页第220页第221页第222页第223页第224页第225页第226页第227页第228页第229页第230页第231页第232页第233页第234页第235页第236页第237页第238页第239页第240页第241页第242页第243页第244页第245页第246页第247页第248页第249页第250页第251页第252页第253页第254页第255页第256页第257页第258页第259页第260页第261页第262页第263页第264页
Serial Module
8-10
MC68307 USER’S MANUAL
MOTOROLA
the error is not recognized until the final check is performed, and no indication exists as to
which character in the message is at fault.
In either mode, reading the USR does not affect the FIFO. The FIFO is 'popped' only when
the receive buffer is read. The USR should be read prior to reading the receive buffer. If all
three of the FIFO's receiver holding registers are full when a new character is received, the
new character is held in the receiver shift register until a FIFO position is available. If an addi-
tional character is received during this state, the contents of the FIFO are not affected. How-
ever, the character previously in the receiver shift register is lost, and the OE bit in the USR
is set when the receiver detects the start bit of the new overrunning character.
To support control flow capability, the receiver can be programmed to automatically negate
and assert RTS. When in this mode, RTS is automatically negated by the receiver when a
valid start bit is detected and the FIFO stack is full. When a FIFO position becomes avail-
able, RTS is asserted by the receiver. Using this mode of operation, overrun errors are pre-
vented by connecting the RTS to the CTS input of the transmitting device.
Note that in order to use the RTS or CTS signals, the MC68307 port B control register must
be set up to enable the corresponding I/O pins for these functions. By default these signals
function as port B bits 4 and 5 respectively.
If the FIFO stack contains characters and the receiver is disabled, the characters in the FIFO
can still be read by the CPU. If the receiver is reset, the FIFO stack and all receiver status
bits, corresponding output ports, and interrupt request are reset. No additional characters
are received until the receiver is re-enabled.
8.3.3 Looping Modes
The UART can be configured to operate in various looping modes as shown in Figure 8-7.
These modes are useful for local and remote system diagnostic functions. The modes are
described in the following paragraphs with further information available in Section 8.4 Reg-
The UART's transmitter and receiver should both be disabled when switching between
modes. The selected mode is activated immediately upon mode selection, regardless of
whether a character is being received or transmitted.
8.3.3.1 AUTOMATIC ECHO MODE. In this mode, the UART automatically retransmits the
received data on a bit-by-bit basis. The local CPU-to-receiver communication continues nor-
mally, but the CPU-to-transmitter link is disabled. While in this mode, received data is
clocked on the receiver clock and retransmitted on TxD. The receiver must be enabled, but
the transmitter need not be enabled.
Since the transmitter is not active, the TxEMP and TxRDY bits in USR are inactive, and data
is transmitted as it is received. Received parity is checked, but not recalculated for transmis-
sion. Character framing is also checked, but stop bits are transmitted as received. A
received break is echoed as received until the next valid start bit is detected.
相关PDF资料 |
PDF描述 |
|---|---|
| MC68307PU16V | 16-BIT, 16.67 MHz, MICROCONTROLLER, PQFP100 |
| MC68307FG16 | 16-BIT, 16.67 MHz, MICROCONTROLLER, PQFP100 |
| MC68322FT16 | 16-BIT, 16.667 MHz, RISC PROCESSOR, PQFP160 |
| MC68331CFC20B1 | 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132 |
| MC68331CPV20B1 | 32-BIT, 20 MHz, MICROCONTROLLER, PQFP144 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68307UM | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Technical Summary Integrated Multiple-Bus Processor |
| MC68307V | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Technical Summary Integrated Multiple-Bus Processor |
| MC68322 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Integrated Printer Processor |
| MC68322AD | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Integrated Printer Processor |
| MC68322FT20 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
发布紧急采购，3分钟左右您将得到回复。