参数资料
型号: MC68HC05G1B
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封装: SDIP-56
文件页数: 64/124页
文件大小: 732K
代理商: MC68HC05G1B
MOTOROLA
5-10
MC68HC05G1
INTERRUPTS
5
register is cleared and the enable bit in the serial peripheral control register ($2A) is enabled.
When the interrupt is recognized, the current state of the machine is pushed onto the stack and
the interrupt mask bit in the Condition Code register is set. This masks any further interrupt until
the present one is serviced. The SPI interrupt causes the program counter to vector to memory
location $3FF4 and $3FF5 which contains the starting address of the interrupt’s service routine.
Software in the serial peripheral interrupt service routine must determine the priority and the
cause of the SPI interrupt by examining the interrupt ags located in the SPI status register. The
general sequence of clearing an interrupt is a software sequence of accessing the status register
while the ag is set, followed by a read or write of an associated register.
Refer to section 8 - Serial Peripheral Interface for detailed description.
TPG
42
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