- 您现在的位置：买卖IC网 > PDF目录69028 > MC68HC05G1B (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 PDF资料下载
参数资料
| 型号： | MC68HC05G1B |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| 封装： | SDIP-56 |
| 文件页数： | 93/124页 |
| 文件大小： | 732K |
| 代理商： | MC68HC05G1B |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页当前第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页
MOTOROLA
8-4
MC68HC05G1
SERIAL PERIPHERAL INTERFACE
8
Note:
Both the slave device(s) and a master device must be programmed to similar timing
modes for proper data transfer.
When the master device transmits data to a slave via a MOSI line, the slave device responds by
sending data to the master device via the MISO line. This implies full duplex transmission with both
data out and data in synchronized with the same clock signal (one which is provided by the master
device). Thus the byte transmitted is replaced by the byte received and eliminates the need for
separate transmit-empty and receiver-full status bits. A single status bit (SPIF) in the serial
peripheral status register (SPSR, location $2B) is used to signify that the I/O operation is
complete.
Conguration of the MOSI pin is a function of the MSTR bit in the serial peripheral control register
(SPCR, location $2A). When a device is operating as a master, the MOSI pin is an output because
the program in rmware set the MSTR bit as a logic one.
8.2.2
Master In Slave Out (MISO)
The MISO pin is congured as an input in a master (mode) device and as an output pin in a slave
(mode) device. Data is transferred serially from a slave to a master on this line, most signicant
bit rst. The MISO pin of a slave is placed in a high-impedance state if it is not selected by a
master; i.e., its SS pin is a logic one. The timing diagram in Figure 8-2 shows the relationship
between data and serial clock (SCK). As shown in Figure 8-2, four possible timing relationships
may be chosen by using control bits CPOL and CPHA. The master device always allows data to
be applied on the MISO line a half-cycle before the serial clock edge (SCK) in order for the slave
device to latch the data.
Note:
Both the slave device(s) and a master device must be programmed to similar timing
modes for proper data transfer.
When a master device transmits data to a slave device via the MOSI line, the slave device
responds by sending data to the master device via the MISO line. This implies full duplex
transmission with both data out and data in synchronized with the same clock signal (one which
is provided by the master device). Thus, the byte transmitted is replaced by the byte received and
eliminates the need for separate transmit-empty and receiver-full status bits. A single status bit
(SPIF) in the serial peripheral status register (SPSR, location $2B) is used to signify that the I/O
operation is complete.
In the master device, the MSTR control bit in the serial peripheral control register (SPCR, location
$2A) is set to a logic one (by the program) to allow the master device to receive data on its MISO
pin. In the slave device, its MISO pin is enabled by the logic level of the SS pin; i.e., if SS=1 then
the MISO pin is placed in a high impedance state, whereas, if SS=0 the MISO pin is an output for
the slave device.
TPG
66
相关PDF资料 |
PDF描述 |
|---|---|
| MC68HC705JB2DW | 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDSO20 |
| MC68HC705JB2P | 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC705JB4P | 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP28 |
| MC68HC705K1CDW | 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDSO16 |
| MC68HC705K1CP | 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC05J1 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05J1A | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACDW | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACP | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ADW | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
发布紧急采购，3分钟左右您将得到回复。