参数资料
型号: MC68HC05SB7
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封装: MO-150, SSOP-28
文件页数: 17/170页
文件大小: 2161K
代理商: MC68HC05SB7
August 27, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05SB7
ANALOG SUBSYSTEM
MOTOROLA
REV 2.1
15-15
CHG
The CHG enable bit allows direct control of the charge current source and the
discharge device; and also reects the state of the discharge device. This bit is
cleared if the ISEN enable bit is also cleared. This bit is cleared by a reset of
the device.
1 =
The charge current source is sourcing current out of the CAP pin.
Writing a logical one enables the charging current out of the CAP
pin, if the ISEN bit is also set.
0 =
The discharge device is sinking current into the CAP pin. Writing a
logical zero disables the charging current and enables the
discharging current into the CAP pin.
ATD1:2
The ATD1:2 enable bits select one of the four operating modes used for making
A/D conversions via the single-slope method.These four modes are given in
Table 15-3. These bits have no effect if the ISEN enable bit is cleared. These
bits are cleared by a reset of the device; and thereby returning the analog sub-
system to the manual A/D conversion method.
Table 15-3. A/D Conversion Options
A/D
Option
Mode
Charge
Control
A/D Options
Current Flow To/From CAP
ISEN
ATD2
ATD1
CHG
Disabled
Current
Source and
Discharge
Disabled
0
XXX
Current control disabled, no source or sink cur-
rent.
0
Manual
Charge and
Discharge
1000
Begin sinking current when the CHG bit is
cleared; and continue to sink current until the
CHG bit is set.
1001
Begin sourcing current when the CHG bit is set;
and continue to source current until the CHG bit is
cleared.
1
Manual
Charge and
Automatic
Discharge
1010
Begin sinking current when the CHG bit is
cleared; and continue to sink current until the
CHG bit is set. (The CHG bit is cleared by writing
a logical zero to it; or when the CPF flag bit is
set.)
1011
Begin sourcing current when the CHG bit is set;
and continue to source current until the CHG bit is
cleared. (The CHG bit is cleared by writing a logi-
cal zero to it; or when the CPF flag bit is set.)
2
Automatic
Charge and
Discharge
(TOF-ICF)
Synchronized
to Timer
1100
The CHG bit remains cleared as long as current
is being sunk. Begin sourcing current when the
next Timer TOF occurs.
1101
The CHG bit remains set as long as current is
being sourced. Begin sinking current when the
next Timer ICF occurs.
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