参数资料
型号: MC68HC11C0FN3
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 3 MHz, MICROCONTROLLER, PQCC68
封装: PLASTIC, LCC-68
文件页数: 9/76页
文件大小: 394K
代理商: MC68HC11C0FN3
MC68HC11C0
MOTOROLA
MC68HC11C0TS/D
17
Bits [7:6] — Not implemented
Always read zero
RWMC — Read/Write Mode Strobe Mode Control
Bits [4:3] — Not implemented
Always read zero
NOCOP — COP Watchdog Timer Disable
RAMON — RAM Enable
In all modes except expanded mode, RAMON is forced to one out of reset.
0 = 256 bytes of RAM present in the memory map
1 = 256 bytes of RAM removed from the memory map and powered off
Bit 0 — Not implemented
Always reads zero
3.3 Bootstrap ROM
When operating in expanded mode, the bootstrap ROM is disabled and removed from the memory map.
In bootstrap and special test modes, bootstrap ROM is present at $FC00–$FFFF. In single-chip mode
the bootstrap ROM appears at locations $FC00–$FFFF and $BC00–$BFFF. Bootstrap ROM cannot be
remapped to other locations.
The bootstrap ROM contains a small program that allows program code to be downloaded into on-chip
RAM. When the MC68HC11C0 enters bootstrap mode, bootloader firmware residing in bootstrap ROM
begins the downloading procedure by initializing the SCI system and transmitting a break out the SCI
TxD pin. The SCI then waits for the first character to be received. After the first character is received on
the RxD pin of the SCI, bootloader firmware begins counting the number of bytes received. When an
idle time of four characters or the character for address $04FF is received, the bootloader program ter-
minates the download and control is passed to the loaded program at $0400. For a detailed description
of the M68HC11 bootstrap mode, refer to application note
M68HC11 Bootstrap Mode (AN1060/D).
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