参数资料
型号: MC705JP7CPE
厂商: Freescale Semiconductor
文件页数: 136/164页
文件大小: 0K
描述: IC MCU 8BIT 224 BYTES RAM 28PDIP
标准包装: 13
系列: HC05
核心处理器: HC05
芯体尺寸: 8-位
速度: 2.1MHz
连通性: SIO
外围设备: POR,温度传感器,WDT
输入/输出数: 22
程序存储器容量: 6KB(6K x 8)
程序存储器类型: OTP
RAM 容量: 224 x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
数据转换器: A/D 4x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-DIP(0.600",15.24mm)
包装: 管件
Analog Multiplex Register
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
73
8.2 Analog Multiplex Register
The analog multiplex register (AMUX) controls the general interconnection and operation. The control bits
in the AMUX are shown in Figure 8-2.
HOLD, DHOLD
These read/write bits control the source connection to the negative input of voltage comparator 2
shown in Figure 8-3. This allows the voltage on the internal temperature sensing diode, the channel
selection bus, or the divide-by-two channel selection bus to charge the internal sample capacitor and
to also be presented to comparator 2. The decoding of these sources is given in Table 8-1.
During the hold case when both the HOLD and DHOLD bits are clear, the VOFF bit in the analog status
register (ASR) can offset the VSS reference on the sample capacitor by approximately 100 mV. This
offset source is bypassed whenever the sample capacitor is being charged with either the HOLD or
DHOLD bit set. The VOFF bit must be enabled by the OPT bit in the COPR at location $1FF0.
Figure 8-3. Comparator 2 Input Circuit
Address:
$0003
Bit 7
654321
Bit 0
Read:
HOLD
DHOLD
INV
VREF
MUX4
MUX3
MUX2
MUX1
Write:
Reset:
10000000
Figure 8-2. Analog Multiplex Register (AMUX)
+
COMP2
SAMPLE
HOLD
DHOLD
CAP
TEMPERATURE
DIODE
INTERNAL
VOFF
VSS
OFFSET
+
OPT (MOR)
CHANNEL
PB0
SELECTION
BUS
VDD
80 k
80 k
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