参数资料
型号: MC705JP7CPE
厂商: Freescale Semiconductor
文件页数: 93/164页
文件大小: 0K
描述: IC MCU 8BIT 224 BYTES RAM 28PDIP
标准包装: 13
系列: HC05
核心处理器: HC05
芯体尺寸: 8-位
速度: 2.1MHz
连通性: SIO
外围设备: POR,温度传感器,WDT
输入/输出数: 22
程序存储器容量: 6KB(6K x 8)
程序存储器类型: OTP
RAM 容量: 224 x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
数据转换器: A/D 4x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-DIP(0.600",15.24mm)
包装: 管件
Interrupts
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
34
Freescale Semiconductor
4.3 Interrupt Processing
To begin servicing an interrupt, the CPU does these actions:
Stores the CPU registers on the stack in the order shown in Figure 4-1
Sets the I bit in the condition code register to prevent further interrupts
Loads the program counter with the contents of the appropriate interrupt vector locations as shown
The return-from-interrupt (RTI) instruction causes the CPU to recover its register contents from the stack
as shown in Figure 4-1. The sequence of events caused by an interrupt is shown in the flowchart in
$0020
Bottom of RAM
$0021
$00BE
$00BF
$00C0
Bottom of Stack
$00C1
$00C2
Unstacking
Order
?
n
Condition Code Register
5
1
n+1
Accumulator
4
2
n+2
Index Register
3
n+3
Program Counter (High Byte)
2
4
n+4
Program Counter (Low Byte)
1
5
Stacking
Order
$00FD
$00FE
$00FF
Top of Stack (RAM)
Figure 4-1. Interrupt Stacking Order
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