参数资料
型号: MC9328MX21VH
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 266 MHz, MICROPROCESSOR, PBGA289
封装: 17 X 17 MM, 1.45 MM HEIGHT, 0.80 MM PITCH, MAPBGA-289
文件页数: 12/106页
文件大小: 1932K
代理商: MC9328MX21VH
Signal Descriptions
MC9328MX21 Product Preview, Rev. 1.1
Freescale Semiconductor
13
SD1_D[3:0]
SD Data bidirectional signals—If the system designer does not want to make use of the internal
pull-up, via the Pull-up enable register, a 50 K–69K external pull up resistor must be added.
SD1_D[3] is muxed with CSPI3_SS while SD1_D[0] is muxed with CSPI3_MISO.
SD2_CMD
SD Command bidirectional signal. This signal is multiplexed with SLCDC1_CS signal from
SLCDC1.
SD2_CLK
SD Output Clock signal. This signal is multiplexed with SLCDC1_CLK signal from SLCDC1.
SD2_D[3:0]
SD Data bidirectional signals. SD2_D[3:2] are which are multiplexed with SLCDC1_RS and
SLCDC_D0 signals from SLCDC1.
UARTs – IrDA/Auto-Bauding
UART1_RXD
Receive Data input signal
UART1_TXD
Transmit Data output signal
UART1_RTS
Request to Send input signal
UART1_CTS
Clear to Send output signal
UART2_RXD
Receive Data input signal. This signal is multiplexed with KP_ROW6 signal from KPP.
UART2_TXD
Transmit Data output signal. This signal is multiplexed with KP_COL6 signal from KPP.
UART2_RTS
Request to Send input signal. This signal is multiplexed with KP_ROW7 signal from KPP.
UART2_CTS
Clear to Send output signal. This signal is multiplexed with KP_COL7 signal from KPP.
UART3_RXD
Receive Data input signal. This signal is multiplexed with IR_RXD from FIRI.
UART3_TXD
Transmit Data output signal. This signal is multiplexed with IR_TXD from FIRI.
UART3_RTS
Request to Send input signal
UART3_CTS
Clear to Send output signal
UART4_RXD
Receive Data input signal which is multiplexed with USBH1_RXDP and USBH1_TXDP.
UART4_TXD
Transmit Data output signal which is multiplexed with USBH1_TXDM.
UART4_RTS
Request to Send input signal which is multiplexed with USBH1_FS and USBH1_RXDP.
UART4_CTS
Clear to Send output signal which is multiplexed with USBH1_TXDP and USBH1_RXDM.
Serial Audio Port – SSI (configurable to I2S protocol and AC97)
SSI1_CLK
Serial clock signal which is output in master or input in slave
SSI1_TXD
Transmit serial data
SSI1_RXD
Receive serial data
SSI1_FS
Frame Sync signal which is output in master and input in slave
SSI1_MCLK
SSI1 master clock. Multiplexed with TOUT.
SSI2_CLK
Serial clock signal which is output in master or input in slave.
SSI2_TXD
Transmit serial data signal
SSI2_RXD
Receive serial data
Table 2. i.MX21 Signal Descriptions (Continued)
Signal Name
Function/Notes
相关PDF资料
PDF描述
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MC9328MX21VK 功能描述:处理器 - 专门应用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432
MC9328MX21VK 制造商:Freescale Semiconductor 功能描述:Microprocessor
MC9328MX21VKR2 功能描述:处理器 - 专门应用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432
MC9328MX21VM 功能描述:处理器 - 专门应用 DB I.MX21 17X17 PB-FR RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432
MC9328MX21VM 制造商:Freescale Semiconductor 功能描述:Microprocessor