参数资料
型号: MCHC705JJ7CPE
厂商: Freescale Semiconductor
文件页数: 153/164页
文件大小: 0K
描述: IC MCU 8BIT 224 BYTES RAM 20PDIP
标准包装: 18
系列: HC05
核心处理器: HC05
芯体尺寸: 8-位
速度: 2.1MHz
连通性: SIO
外围设备: POR,温度传感器,WDT
输入/输出数: 14
程序存储器容量: 6KB(6K x 8)
程序存储器类型: OTP
RAM 容量: 224 x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
数据转换器: A/D 4x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 20-DIP(0.300",7.62mm)
包装: 管件
Voltage Measurement Methods
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
89
8.6 Voltage Measurement Methods
The methods for obtaining a voltage measurement can use software techniques to express these
voltages as absolute or ratiometric readings.
In most applications the external capacitor, the clock source, the reference voltage, and the charging
current may vary between devices and with changes in supply voltage or ambient temperature. All of
these variations must be considered when determining the desired resolution of the measurement. The
maximum and minimum extremes for the full scale count will be:
NFSMIN = CEXTMIN x VFSMIN x fOSCMIN / (P x ICHGMAX)
NFSMAX = CEXTMAX x VFSMAX x fOSCMAX / (P x ICHGMIN)
The minimum count should be the desired resolution, and the counting mechanism must be capable of
counting to the maximum. The final scaling of the count will be by a math routine which calculates:
VX = VREF x (NX – NOFF) / (NREF – NOFF)
Where:
VREF = Known reference voltage
VX
= Unknown voltage between VSS and VREF
NX
= Conversion count for unknown voltage
NREF = Conversion count for known reference voltage (VREF)
NOFF = Conversion count for minimum reference voltage (VSS)
When VREF is a stable voltage source such as a zener or other reference source, then the unknown
voltage will be determined as an absolute reading. If VREF is the supply source to the device (VDD), then
the unknown voltage will be determined as a ratio of VDD, or a ratiometric reading.
If the unknown voltage applied to the comparator is greater than its common-mode range (VDD –1.5 volts),
then the external capacitor will try to charge to the same level. This will cause both comparator inputs to
be above the common-mode range and the output of the comparator will be indeterminate. In this case
the comparator output flags may also be set even if the actual voltage on the positive input (+) is less than
the voltage on the negative input (–). All A/D conversion methods should have a maximum time check to
determine if this case is occurring.
Once the maximum timeout detection has been made, the state of the comparator outputs can be tested
to determine the situation. However, such tests should be carefully designed when using modes 1, 2, or
3 as these modes cause the immediate automatic discharge of the external ramping capacitor before any
software check can be made of the output state of comparator 2.
NOTE
All A/D conversion methods should include a test for a maximum elapsed
time to detect error cases where the inputs may be outside of the design
specification.
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