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参数资料
| 型号： | MKI41T56S00TR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO8 |
| 封装： | 0.150 INCH, PLASTIC, SOP-8 |
| 文件页数： | 9/16页 |
| 文件大小： | 105K |
| 代理商： | MKI41T56S00TR |
MK41T56, MKI41T56
2/16
Figure 2. DIP Connections
SDA
VSS
SCL
FT/OUT
OSCO
OSCI
VCC
VBAT
AI02305
MK41T56
MKI41T56
1
2
3
4
8
7
6
5
device can then be accessed sequentially in the
following order:
1.
Seconds Register
2.
Minutes Register
3.
Hours Register
4.
Day Register
5.
Date Register
6.
Month Register
7.
Years Register
8.
Control Register
9 to 64. RAM
The clock continually monitors VCC for an out of
tolerance condition. Should VCC fall below VPFD,
the device terminates an access in progress and
resets the device address counter. Inputs to the
device will not be recognized at this time to pre-
vent erroneous data from being written to the de-
vice from an out of tolerance system. When VCC
falls below VBAT, the device automatically switch-
es over to the battery and powers down into an ul-
tra low current mode of operation to conserve
battery life. Upon power-up, the device switches
from battery to VCC at VBAT and recognizes inputs
when VCC goes above VPFD volts.
Figure 3. SOIC Connections
1
SDA
VSS
SCL
FT/OUT
OSCO
OSCI
VCC
VBAT
AI02306
MK41T56
MKI41T56
2
3
4
8
7
6
5
Table 1. Signal Names
OSCI
Oscillator Input
OCSO
Oscillator Output
FT/OUT
Frequency Test / Output Driver
(Open Drain)
SDA
Serial Data Address Input / Output
SCL
Serial Clock
VBAT
Battery Supply Voltage
VCC
Supply Voltage
VSS
Ground
OPERATION
The MK41T56 clock operates as a slave device on
the serial bus. Access is obtained by implementing
a start condition followed by the correct slave ad-
dress (11010000). The 64 bytes contained in the
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