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参数资料
| 型号： | ML60851CTB |
| 厂商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封装： | 10 X 10 MM, 0.80 MM PITCH, PLASTIC, TQFP-44 |
| 文件页数： | 9/68页 |
| 文件大小： | 442K |
| 代理商： | ML60851CTB |
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PEDL60851C-02
1Semiconductor
ML60851C
16/67
EP0 Receive packet ready bit (D0)
This bit can be read by the local MCU. Further, this bit can be set to “0” by writing “1” to the D0 bit.
The conditions of asserting and deasserting this bit are the following.
Bit name
Asserting condition
Action when asserted
EP0 Receive packet ready (D0)
1. When data is received in EP0
and storing of one packet of
receive data in EP0RXFIFO is
completed.
2. When a setup packet is received
during a control Read or a control
Write transfer.
EP0 is locked (that is, an NAK is
returned automatically when a data
packet is received from the host
computer).
(In the case of the asserting
condition 1, the local MCU can read
EP0RXFIFO.)
Bit name
Deasserting condition
Action when deasserted
EP0 Receive packet ready (D0)
1. When the local MCU resets
(writes a “1” in) this bit.
2. When the local MCU resets the
setup ready bit during a control
Write transfer.
Reception is possible in EP0.
R/Reset: Reading possible/ Reset when a “1” is written
R/Set:
Reading possible/ Set when a “1” is written
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