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参数资料
| 型号： | MPC5606SCMG6 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PBGA208 |
| 封装： | 17 X 17 MM, 1 MM PITCH, MAPBGA-208 |
| 文件页数： | 36/134页 |
| 文件大小： | 890K |
| 代理商： | MPC5606SCMG6 |
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MPC560xS Microcontroller Data Sheet, Rev. 5
Preliminary—Subject to Change Without Notice
Revision history
Freescale Semiconductor
130
5
1 Sep 2010 Editorial changes and improvements.
Replaced “validation” with “characterization” throughout.
Added an entry for Rev. 3 to this table.
In the block diagram, in the SXOSC block, changed “32 kHz” to “32 KHz”.
Revised the feature section and added the “Feature details” subsection.
Renamed the analog pins (were AN..., are ANS...) throughout.
Changed several pin names that contained _A, _B, _C, ... to contain _0, _1, _2, ...
throughout.
Changed the PCS and oscillator pin names throughout.
Revised the feature section and added the “Feature details” subsection.
Deleted the out-of-date “Block summary” section.
In the 144-pin pinout:
For pin 122, changed PCS_B1 to PCS1_1.
For pin 123, changed PCS_B0 to PCS0_1.
In the “144 LQFP package pinout” section, added pinouts for the chips with 512 KB and
256 KB flash memory.
In the 176-pin pinout:
For pin 152, changed PCS_B1 to PCS1_1.
For pin 153, changed PCS_B0 to PCS0_1.
Revised the “Pad configuration during reset phases”, “Voltage supply pins”, “Pad types”,
“System pins”, and “Nexus pins” sections.
Changed several module names and abbreviations to be consistent with the official
module names and abbreviations.
In the “Voltage supply pin descriptions” table, revised the entry for VDD12.
In the “Debug pin descriptions” table, changed pad type M to pad type M1.
In the “Pad types” section, changed “registers in the device reference manual” to
“registers in the SIUL chapter of the device reference manual”.
Changed the name of the port-pin summary section (was “Functional ports A, B, C, D,
E, F, G, H, I, J, K”, is “Port pin summary”).
In the “Signal details” section:
Renamed the analog pins (were AN..., are ANS...).
Added “ANS[0:15] connect to ATD channels [32:47]” to the ANS signal description.
Added “The available 8 multiplexed channels connect to ATD channels [64:71]” to the
MA signal description.
Deleted “when high; otherwise low to allow a subframe display for pixels” from the
DCU_DE description.
Changed the description for DCU_TAG, PDI_PCLK, TXD_A, and SSD signals.
Added QuadSPI signals.
Deleted “For valid Pixel Data this is high, otherwise low” from the PDI_DE
description.
Changed several pin names that contained _A, _B, _C, ... to contain _0, _1, _2, ...
In the “Port pin summary” table:
Changed the pad type for PC[0]—PC[9] (was S, is J).
Moved the AN[0]—AN[15] entries from the “Function” column to the “Special
function” column.
Moved the OSC32K_EXTAL and OSC32K_XTAL entries from the “Function” column
to the “Special function” column.
Added alternate function names and clarifying footnotes to the PF[11]—PF[14]
entries.
Added new information on pad types (including splitting up the existing M pads into
two categories, M1 and M2).
Added a footnote to the “Special function” column title.
Table 66. Document revision history
Revision
Date
Substantive changes
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC5606S
products
in
208
MAPBGA
packages
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