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参数资料
| 型号： | MT48LC4M16A2 |
| 厂商： | Micron Technology, Inc. |
| 英文描述： | SYNCHRONOUS DRAM |
| 中文描述： | 同步DRAM |
| 文件页数： | 33/55页 |
| 文件大小： | 1458K |
| 代理商： | MT48LC4M16A2 |
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33
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2003, Micron Technology, Inc.
64Mb: x4, x8, x16
SDRAM
CAPACITANCE
(Note: 2; notes appear on page 35)
PA RA METER
Input Capacitance: CLK
Input Capacitance: All other input-only pins
Input/Output Capacitance: DQs
SY MBOL
C
I
1
C
I
2
C
IO
MIN
2.5
2.5
4.0
MA X
3.5
3.8
6.0
UNITS NOTES
pF
pF
pF
29
30
31
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Notes: 5, 6, 8, 9, 11; notes appear on page 35); V
DD
, V
DD
Q = +3.3V ±0.3V
AC CHARACTERISTICS
PARAMETER
Access time from CLK (pos. edge)
-6
-7E
-75
-8E
SYMBOL
t
AC(3)
t
AC(2)
t
AH
t
AS
t
CH
t
CL
t
CK(3)
t
CK(2)
t
CKH
t
CKS
t
CMH
t
CMS
t
DH
t
DS
t
HZ(3)
t
HZ(2)
t
LZ
t
OH
t
OH
N
t
RAS
t
RC
t
RCD
t
REF
t
RFC
t
RP
t
RRD
t
T
t
WR
MIN
MAX
5.5
–
MIN
MAX
5.4
5.4
MIN
MAX
5.4
6
MIN
MAX
6
6
UNITS NOTES
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
–
CL = 3
CL = 2
27
Address hold time
Address setup time
CLK high-level width
CLK low-level width
Clock cycle time
1
0.8
1.5
2.5
2.5
7
7.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
1.5
2.5
2.5
7.5
10
0.8
1.5
0.8
1.5
0.8
1.5
1
2
3
3
8
10
1
2
1
2
1
2
1.5
2.5
2.5
6
–
1
1.5
1
1.5
1
1.5
CL = 3
CL = 2
23
23
CKE hold time
CKE setup time
CS#, RAS#, CAS#, WE#, DQM hold time
CS#, RAS#, CAS#, WE#, DQM setup time
Data-in hold time
Data-in setup time
Data-out high-impedance time
CL = 3
CL = 2
5.5
–
5.4
5.4
5.4
6
6
6
10
10
Data-out low-impedance time
Data-out hold time (load)
Data-out hold time (no load)
ACTIVE to PRECHARGE command
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
Refresh period (4,096 rows)
AUTO REFRESH period
PRECHARGE command period
ACTIVE bank
a
to ACTIVE bank
b
command
Transition time
WRITE recovery time
1
2
1
3
1
3
1
3
1.8
42
60
18
1.8
37
60
15
1.8
44
66
20
1.8
50
70
20
28
120,000
120,000
120,000
120,000
64
64
64
64
60
18
12
0.3
66
15
14
0.3
66
20
15
0.3
70
20
20
0.3
1.2
1.2
1.2
1.2
7
24
1 CLK +
6ns
12
70
1 CLK +
7ns
14
67
1 CLK +
7.5ns
15
75
1 CLK +
7ns
15
80
ns
ns
25
20
Exit SELF REFRESH to ACTIVE command
t
XSR
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