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参数资料
| 型号： | MX10EXAUI |
| 厂商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 30 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, LQFP-44 |
| 文件页数： | 19/55页 |
| 文件大小： | 476K |
| 代理商： | MX10EXAUI |
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P/N:PM0625 Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.0, JUL. 01, 2005
MX10EXA
Auto-Reload Mode (Up or Down Counter)
In the auto-reload mode, the timer registers are loaded
with the 16-bit value in T2CAPH and T2CAPL when the
count overflows. T2CAPH and T2CAPL are initialized by
software. If the EXEN2 bit in T2CON is set, the timer
registers will also be reloaded and the EXF2 flag set
when a 1-to-0 transition occurs at input T2EX. The auto-
reload mode is shown in Figure 12.
In this mode, Timer 2 can be configured to count up or
down. This is done by setting or clearing the bit DCEN
(Down Counter Enable) in the T2MOD special function
register (see Table 4). The T2EX pin then controls the
count direction. When T2EX is high, the count is in the
up direction, when T2EX is low, the count is in the down
direction.
Figure 12 shows Timer 2, which will count up automati-
cally, since DCEN = 0. In this mode there are two op-
tions selected by bit EXEN2 in the T2CON register. If
EXEN2 =0, then Timer 2 counts up to FFFFH and sets
the TF2 (Overflow Flag) bit upon overflow. This causes
the Timer 2 registers to be reloaded with the 16-bit value
in T2CAPL and T2CAPH, whose values are preset by
software. If EXEN2 = 1, a 16-bit reload can be triggered
either by an overflow or by a 1 -to-0 transition at input
T2EX. This transition also sets the EXF2 bit. If enabled,
either TF2 or EXF2 bit can generate the Timer 2 inter-
rupt.
In Figure 13, the DCEN = 1; this enables the Timer 2 to
count up or down. In this mode, the logic level of T2EX
pin controls the direction of count. When a logic "1" is
applied at pin T2EX, the Timer 2 will count up. The Timer
2 will overflow at FFFFH and set the TF2 flag, which can
then generate an interrupt if enabled. This timer overflow,
also causes the 16-bit value in T2CAPL and T2CAPH to
be reloaded into the timer registers TL2 and TH2, respec-
tively.
A logic "0" at pin T2EX causes Timer 2 to count down.
When counting down, the timer value is compared to the
16-bit value contained in T2CAPH and T2CAPL. When
the value is equal, the timer register is loaded with FFFF
hex. The underflow also sets the TF2 flag, which can
generate an interrupt if enabled.
The external Flag EXF2 toggles when Timer 2 underflows
or overflows. This EXF2 bit can be used as a 17th bit of
resolution, if needed. the EXF2 flag does not generate
an interrupt in this mode. As the baud rate generator,
timer T2 is incremented by TCLK.
Baud Rate Generator Mode
By setting the TCLKn and/or RCLKn in T2CON or T2MOD,
the Timer 2 can be chosen as the baud rate generator for
either or both UARTs. The baud rates for transmit and
receive can be
simultaneously different.
Programmable Clock-Out
A 50% duty cycle clock can be programmed to come
out on P1 .6. This pin, besides being a regular I/O pin,
has two alternate functions. It can be programmed (1) to
input the external clock for Timer/Counter 2 or (2) to out-
put a 50% duty cycle clock ranging from 3.58Hz to
3.75MHz at a 30MHz operating frequency.
To configure the Timer/Counter 2 as a clock generator,
bit C/T2 (in T2CON) must be cleared and bit T2OE in
T2MOD must be set. Bit TR2 (T2CON.2) also must be
set to start the timer.
The Clock-Out frequency depends on the oscillator fre-
quency and the reload value of Timer 2 capture registers
(TCAP2H, TCAP2L) as shown in this equation:
In the Clock-Out mode Timer 2 roll-overs will net gener-
ate an interrupt. This is similar to when it is used as a
baud-rate generator. It is possible to use Timer 2 as a
baud-rate generator and a clock generator simultaneously.
Note, however, that the baud-rate will be 1/8 of the Clock-
Out frequency.
TCLK
2 x (65536 - TCAP2H, TCAP2L)
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