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| 型号： | NCP1608BDR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 10/24页 |
| 文件大小： | 0K |
| 描述： | IC PFC CTLR/PRECONVERTER 8-SOIC |
| 标准包装： | 1 |
| 模式： | 临界传导（CRM） |
| 电流 - 启动： | 24µA |
| 电源电压： | 10.2 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 标准包装 |
| 其它名称： | NCP1608BDR2GOSDKR |
NCP1608
+
Bulk
Introduction
The NCP1608 is a voltage mode, power factor correction
(PFC) controller designed to drive cost ? effective
pre-converters to comply with line current harmonic
regulations. This controller operates in critical conduction
mode (CrM) suitable for applications up to 350 W. Its
voltage mode scheme enables it to obtain near unity power
factor without the need for a line-sensing network. A high
precision transconductance error amplifier regulates the
output voltage. The controller implements comprehensive
safety features for robust designs.
The key features of the NCP1608 are:
? Constant On Time (Voltage Mode) CrM Operation. A
high power factor is achieved without the need for
input voltage sensing. This enables low standby power
consumption.
? Accurate and Programmable On Time Limitation. The
NCP1608 uses an accurate current source and an
external capacitor to generate the on time.
? Wide Control Range. In high power applications (>
150 W), inadvertent skipping can occur at high input
voltage and high output power if noise immunity is
not provided. The noise immunity provided by the
NCP1608 prevents inadvertent skipping.
? High Precision Voltage Reference. The error amplifier
reference voltage is guaranteed at 2.5 V ± 1.6% over
process and temperature. This results in accurate
output voltages.
? Low Startup Current Consumption. The current
consumption is reduced to a minimum (< 35 m A)
during startup, enabling fast, low loss charging of
V CC . The NCP1608 includes undervoltage lockout and
provides sufficient V CC hysteresis during startup to
reduce the value of the V CC capacitor.
? Powerful Output Driver. A Source 500 mA / Sink
800 mA totem pole gate driver enables rapid turn on
and turn off times. This enables improved efficiencies
and the ability to drive higher power MOSFETs. A
combination of active and passive circuits ensures that
the driver output voltage does not float high if V CC
does not exceed V CC(on) .
? Accurate Fixed Overvoltage Protection (OVP). The
OVP feature protects the PFC stage against excessive
output overshoots that may damage the system.
Overshoots typically occur during startup or transient
loads.
? Undervoltage Protection (UVP). The UVP feature
protects the system if there is a disconnection in the
power path to C bulk (i.e. C bulk is unable to charge).
? Protection Against Open Feedback Loop. The OVP
and UVP features protect against the disconnection of
the output divider network to the FB pin. An internal
resistor (R FB ) protects the system when the FB pin is
floating (Floating Pin Protection, FPP).
? Overcurrent Protection (OCP). The inductor peak
current is accurately limited on a cycle-by-cycle basis.
The maximum inductor peak current is adjustable by
modifying the current sense resistor. An integrated
LEB filter reduces the probability of noise
inadvertently triggering the overcurrent limit.
? Shutdown Feature. The PFC pre-converter is shutdown
by forcing the FB pin voltage to less than V UVP . In
shutdown mode, the I CC current consumption is
reduced and the error amplifier is disabled.
Application Information
Most electronic ballasts and switching power supplies
use a diode bridge rectifier and a bulk storage capacitor to
produce a dc voltage from the utility ac line (Figure 24).
This DC voltage is then processed by additional circuitry
to drive the desired output.
Rectifiers Converter
AC
Line
Storage Load
Capacitor
Figure 24. Typical Circuit without PFC
This rectifying circuit consumes current from the line
when the instantaneous ac voltage exceeds the capacitor
voltage. This occurs near the line voltage peak and the
resulting current is non-sinusoidal with a large harmonic
content. This results in a reduced power factor (typically <
0.6). Consequently, the apparent input power is higher than
the real power delivered to the load. If multiple devices are
connected to the same input line, the effect increases and
a “line sag” is produced (Figure 25).
V peak
Rectified DC
0
Line
Sag
AC Line Voltage
0
AC Line Current
Figure 25. Typical Line Waveforms without PFC
Government regulations and utilities require reduced
line current harmonic content. Power factor correction is
implemented with either a passive or an active circuit to
comply with regulations. Passive circuits contain a
combination of large capacitors, inductors, and rectifiers
that operate at the ac line frequency. Active circuits use a
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