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参数资料
| 型号： | NCP1608BDR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | IC PFC CTLR/PRECONVERTER 8-SOIC |
| 标准包装： | 1 |
| 模式： | 临界传导（CRM） |
| 电流 - 启动： | 24µA |
| 电源电压： | 10.2 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 标准包装 |
| 其它名称： | NCP1608BDR2GOSDKR |
NCP1608
C bulk w
P out
@ V REF @ R out1 @ out2
V out(OVP) +
V OVP R ) R FB
V REF
R out2 @ R FB
Overvoltage Protection (OVP)
The low bandwidth of the feedback network causes
active PFC stages to react to changes in output load or input
voltages slowly. Consequently, there is a risk of overshoots
during startup, load steps, and line steps. For reliable
operation, it is critical that overvoltage protection (OVP)
prevents the output voltage from exceeding the ratings of
the PFC stage components. The NCP1608 detects
excessive output voltages and disables the driver until V out
decreases to a safe level, which ensures that V out is within
the PFC stage component ratings. An internal comparator
connected to the FB pin provides the OVP protection. The
OVP detection voltage is calculated using Equation 13:
(eq. 13)
) 1
Where V OVP /V REF is the OVP detection threshold.
The value of C bulk is sized to ensure that OVP is not
inadvertently triggered by the 100 Hz or 120 Hz ripple of
V out . The minimum value of C bulk is calculated using
Equation 14:
(eq. 14)
2 @ p @ V ripple(peak ? peak) @ f line @ V out
Where V ripple(peak-peak) is the peak ? to ? peak output voltage
ripple and f line is the ac line frequency.
V ripple(peak-peak) is calculated using Equation 15:
V ripple(peak ? peak) t 2 @ V out(OVP) * V out (eq. 15)
The OVP logic includes hysteresis (V OVP(HYS) ) to
ensure that V out has sufficient time to discharge before the
NCP1608 attempts to restart and to ensure noise immunity.
The output voltage at which the NCP1608 attempts a restart
(V out(OVPL) ) is calculated using Equation 16:
V out(OVPL) +
V OVP
V REF
@ V REF * V OVP(HYS)
@ R out1 @
R out2 ) R FB
R out2 @ R FB
) 1
(eq. 16)
Figure 43 depicts the operation of the OVP circuitry.
V out
V out(OVP)
V out(OVPL)
DRV
OVP Fault
Figure 43. OVP Operation
Undervoltage Protection (UVP)
When the input voltage is applied to the PFC stage, V out
is forced to equate to the peak of the line voltage. The
NCP1608 detects an undervoltage fault if V out is unusually
low, such that V FB is less than V UVP . During an UVP fault,
the drive and error amplifier are disabled. The UVP feature
protects the system if there is a disconnection in the power
path to C bulk (i.e. C bulk is unable to charge) or if R out1 is
disconnected.
The output voltage that causes an UVP fault is calculated
using Equation 17:
Open Feedback Loop Protection
The NCP1608 features comprehensive protection
against open feedback loop conditions by including OVP,
UVP, and FPP. Figure 44 illustrates three conditions in
which the feedback loop is open. The corresponding
number below describes each condition shown in
Figure 44.
1. UVP Protection: The connection from R out1 to
the FB pin is open. R out2 pulls down the FB pin
to ground. The UVP comparator detects an UVP
fault and the drive and error amplifier are
V out(UVP) + V UVP @ R out1 @
R out2 ) R FB
R out2 @ R FB
) 1
(eq. 17)
disabled.
2. OVP Protection: The connection from R out2 to
the FB pin is open. R out1 pulls up the FB pin to
V out . The ESD diode clamps the FB voltage to
10 V and R out1 limits the current into the FB pin.
The OVP comparator detects an OVP fault and
the drive is disabled.
http://onsemi.com
19
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