参数资料
| 型号： | NCP4208MNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 12/30页 |
| 文件大小： | 0K |
| 描述： | IC CTLR 8PH VR11.1 PMBUS 48-QFN |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel VR11.1 |
| 输入电压： | 4.7 V ~ 5.75 V |
| 输出数： | 8 |
| 输出电压： | 0.16 V ~ 5 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 带卷 (TR) |
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NCP4208
I ILIMFS +
V ILIMFS * V CSCOMP
R ILIMFS
I ILIMFS +
V CSREF * V CSCOMP +
R CS
R PH
R CS
R L + 1 m W
R PH
R CSA I LOAD
R ILIMFS
R CSA +
DCR(inductor) RCS
R PH
R ILIMIFS
20 m A +
+ 7.5 k W
1 m W 150 AD
R ILIMIFS
Current Limit Setpoint
The current limit threshold on the NCP4208 is
programmed by a resistor between the I ILIMFS pin and the
CSCOMP pin. The I ILIMFS current, I ILIMFS , is compared
with an internal current reference of 20 m A. If I ILIMFS
exceeds 20 m A then the output current has exceeded the limit
and the current limit protection is tripped.
(eq. 1)
Where V ILIMFS = V CSREF
V CSREF * V CSCOMP
R ILIMFS
(eq. 2)
R L I LOAD
Where R L = DCR of the Inductor.
Assuming that:
(eq. 3)
i.e. the external circuit is set up for a 1 m W Loadline then
the R ILIMFS is calculated as follows:
1 m W I LOAD
I ILIMFS + (eq. 4)
Assuming we want a current limit of 150 A that means that
I LIMFS must equal 20 m A at that load.
(eq. 5)
Solving this equation for R LIMITFS we get 7.5 k W .
The current limit threshold can be modified from the
resistor programmed value by using the I 2 C interface using
Bits <4:0> of the Current Limit Threshold command
(0xE2). The limit is programmable between 50% of the
external limit and 146.7% of the external limit. The
resolution is 3.3%. Table 3 gives some examples codes.
Table 3. Current Limit
Code Current Limit (% of External Limit)
reference input voltage directly to tell the error amplifier
where the output voltage should be. This allows enhanced
feed ? forward response.
Output Current Monitor
I MON is an analog output from the NCP4208 representing
the total current being delivered to the load. It outputs an
accurate current that is directly proportional to the current
set by the I LIMFS resistor. The current is then run through a
parallel RC connected from the I MON pin to the FBRTN pin
to generate an accurately scaled and filtered voltage as per
the VR11.1 specification. The size of the resistor is used to
set the I MON scaling.
I IMON + 10 (eq. 6)
and
(eq. 7)
If the I MON and the OCP need to be changed based on the
TDC of the CPU, then the I LIMFS resistor is the only
component that needs to be changed. If the I MON scaling is
the only change needed then changing the I MON resistor
accomplishes this.
The I MON pin also includes an active clamp to limit the
I MON voltage to 1.15 V MAX while maintaining 900 mV
MIN full scale accurate reporting.
Current Control Mode and Thermal Balance
The NCP4208 has individual inputs (SW1 to SW8) for
each phase that are used for monitoring the current of each
phase. This information is combined with an internal ramp
to create a current balancing feedback system that has been
optimized for initial current balance accuracy and dynamic
thermal balancing during operation. This current balance
information is independent of the average output current
information used for positioning as described in the Output
Current Sensing section.
The magnitude of the internal ramp can be set to optimize
the transient response of the system. It also monitors the
supply voltage for feed ? forward control for changes in the
supply. A resistor connected from the power input voltage
0 0000
0 0001
1 0000
1 0001
1 1110
1 1111
50%
53.3%
100% = default
103.3%
143.3%
146.7%
to the RAMPADJ pin determines the slope of the internal
PWM ramp.
The balance between the phases can be programmed using
the I 2 C Phase Bal SW(x) commands (0xE3 to 0xEA).
This allows each phase to be adjusted if there is a
difference in temperature due to layout and airflow
considerations. The phase balance can be adjusted from a
Active Impedance Control Mode
For controlling the dynamic output voltage droop as a
function of output current, the CSA gain and loadline
programming can be scaled to be equal to the droop
impedance of the regulator times the output current. This
droop voltage is then used to set the input control voltage to
the system. The droop voltage is subtracted from the DAC
default gain of 5 (Bits 4:0 = 10000). The minimum gain
programmable is 3.75 (Bits 4:0 = 00000) and the maximum
gain is 6.25 (Bits 4:0 = 11111).
Voltage Control Mode
A high gain, high bandwidth, voltage mode error
amplifier is used for the voltage mode control loop. The
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