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参数资料
型号： ORT82G5-2F680I
厂商： Lattice Semiconductor Corporation
文件页数： 97/119页
文件大小： 0K
描述： IC FPSC TRANSCEIVER 8CH 680-BGA
产品变化通告： Product Discontinuation 01/Aug/2011
标准包装： 24
系列： *
Lattice Semiconductor
ORCA ORT42G5 and ORT82G5 Data Sheet
79
External Reference Clock
The external reference clock selection and its interface are a critical part of system applications for this product.
Table 38 species reference clock requirements, over the full range of operating conditions. The designer is
encourage to read TN1040, SERDES Reference Clock, which discusses various aspects of this system element
and its interconnection.
Table 38. Reference Clock Specications (REFCLKP and REFCLKN)
Embedded Core Timing Characteristics
Table 39 summarizes the end-to-end latencies through the embedded core for the various modes. All latencies are
given in clock cycles for system clocks at half the REFCLK_[A:B] frequency. For a REFCLK_[A:B] of 156.25 MHz, a
system clock cycle is 6.4 ns.
Table 39. Signal Latencies, Embedded Core
Parameter
Min.
Typ.
Max.
Units
Frequency Range
60
—
185
MHz
Frequency Tolerance
1
-350
—
350
ppm
Duty Cycle (Measured at 50% Amplitude Point)
40
50
60
%
Rise Time
—
500
1000
ps
Fall Time
—
500
1000
ps
P–N Input Skew
—
75
ps
Differential Amplitude
500
800
2 x VDDIB
mVp-p
Common Mode Level
Vsingle-ended/2
0.75
VDD15 – (Vsingle-ended/2)
V
Single-Ended Amplitude
250
400
VDDIB
mVp-p
Input Capacitance (at REFCLKP)
—
5
pF
Input Capacitance (at REFCLKN)
—
5
pF
1. This specication indicates the capability of the high speed receiver CDR PLL to acquire lock when the reference clock frequency and
incoming data rate are not synchronized.
Operating Mode
Signal Latency (max.)
Transmit Path
5 clock cycles
Receive Path
Multi-Channel Alignment Bypassed
1
4.5 clock cycles
With Multi-Channel Alignment
1
13.5-22.5 clock cycles
1. With multi-channel alignment, the latency is largest when the skew between channels is at the maximum that can be correctly
compensated for (18 clock cycles). The latency specied in the table is for data from the channel received rst.
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ORT82G5-2FN680I 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 3.7 Gb Bp ln Xcvr 643K Gt I RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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ORT82G5-3BM680C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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