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参数资料
| 型号： | PCA9698DGG,512 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 36/48页 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C 40B 56TSSOP |
| 产品培训模块： | I²C Bus Fundamentals |
| 特色产品： | NXP - I2C Interface |
| 标准包装： | 35 |
| 接口： | I²C |
| 输入/输出数： | 40 |
| 中断输出： | 是 |
| 频率 - 时钟： | 1MHz |
| 电源电压： | 2.3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 56-TSSOP |
| 包装： | 管件 |
| 包括： | POR |
| 产品目录页面： | 826 (CN2011-ZH PDF) |
| 其它名称： | 568-3241-5 935278614512 PCA9698DGG |
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41
7810C–AVR–10/12
Atmel ATmega328P [Preliminary]
9.10.4
Internal Voltage Reference
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power. When
turned on again, the user must allow the reference to start up before the output is used. If the
reference is kept on in sleep mode, the output can be used immediately. Refer to “Internal Volt-
age Reference” on page 48 for details on the start-up time.
9.10.5
Watchdog Timer
If the Watchdog Timer is not needed in the application, the module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes and hence always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. Refer to “Watchdog Timer” on page 49 for details on how to configure the Watchdog Timer.
9.10.6
Port Pins
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important is then to ensure that no pins drive resistive loads. In sleep modes where both
the I/O clock (clk
I/O) and the ADC clock (clkADC) are stopped, the input buffers of the device will
be disabled. This ensures that no power is consumed by the input logic when not needed. In
some cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. Refer to the section “Digital Input Enable and Sleep Modes” on page 70 for details on
which pins are enabled. If the input buffer is enabled and the input signal is left floating or have
an analog signal level close to V
CC/2, the input buffer will use excessive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
CC/2 on an input pin can cause significant current even in active mode. Digital
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1 and
DIDR0). Refer to “DIDR1 – Digital Input Disable Register 1” on page 241 and “DIDR0 – Digital
Input Disable Register 0” on page 260 for details.
9.10.7
On-chip Debug System
If the On-chip debug system is enabled by the DWEN Fuse and the chip enters sleep mode, the
main clock source is enabled and hence always consumes power. In the deeper sleep modes,
this will contribute significantly to the total current consumption.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PCA9698DGGS911,51 | 功能描述:I2C 接口集成电路 40-bit Fm I2C Bus I/O port w/Reset RoHS:否 制造商:NXP Semiconductors 电源电压-最大:5.5 V 电源电压-最小:2.3 V 最大工作频率:400 KHz 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-16 |
| PCA9698DGGT | 制造商:NXP Semiconductors 功能描述:I2C GPIO Expander 5.5V 56-Pin TSSOP T/R |
| PCA9698DGG-T | 制造商:NXP Semiconductors 功能描述:I2C GPIO Expander 5.5V 56-Pin TSSOP T/R |
| PCA96PWS911,118 | 功能描述:接口-I/O扩展器 8-BIT I2C FM QB RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
| PCA9701D | 功能描述:寄存器 16BIT SPI 18V GPI INT -40 +125 RoHS:否 制造商:NXP Semiconductors 逻辑类型:CMOS 逻辑系列:HC 电路数量:1 最大时钟频率:36 MHz 传播延迟时间: 高电平输出电流:- 7.8 mA 低电平输出电流:7.8 mA 电源电压-最大:6 V 最大工作温度:+ 125 C 封装 / 箱体:SOT-38 封装:Tube |
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