参数资料
型号: PIC12F1822-I/MF
厂商: Microchip Technology
文件页数: 27/109页
文件大小: 0K
描述: IC MCU 8BIT FLASH 8DFN
产品培训模块: 8-bit PIC® Microcontroller Portfolio
标准包装: 120
系列: PIC® XLP™ 12F
核心处理器: PIC
芯体尺寸: 8-位
速度: 32MHz
连通性: I²C,LIN,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 6
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: 闪存
EEPROM 大小: 256 x 8
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 8-VDFN 裸露焊盘
包装: 管件
215
7674F–AVR–09/09
ATmega164P/324P/644P
Note that arbitration is not allowed between:
A REPEATED START condition and a data bit.
A STOP condition and a data bit.
A REPEATED START and a STOP condition.
It is the user software’s responsibility to ensure that these illegal arbitration conditions never
occur. This implies that in multi-master systems, all data transfers must use the same composi-
tion of SLA+R/W and data packets. In other words: All transmissions must contain the same
number of data packets, otherwise the result of the arbitration is undefined.
19.5
Overview of the TWI Module
The TWI module is comprised of several submodules, as shown in Figure 19-9. All registers
drawn in a thick line are accessible through the AVR data bus.
Figure 19-9. Overview of the TWI Module
TWI
Unit
Address Register
(TWAR)
Address Match Unit
Address Comparator
Control Unit
Control Register
(TWCR)
Status Register
(TWSR)
State Machine and
Status control
SCL
Slew-rate
Control
Spike
Filter
SDA
Slew-rate
Control
Spike
Filter
Bit Rate Generator
Bit Rate Register
(TWBR)
Prescaler
Bus Interface Unit
START / STOP
Control
Arbitration detection
Ack
Spike Suppression
Address/Data Shift
Register (TWDR)
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