参数资料
型号: PIC12F1822-I/MF
厂商: Microchip Technology
文件页数: 58/109页
文件大小: 0K
描述: IC MCU 8BIT FLASH 8DFN
产品培训模块: 8-bit PIC® Microcontroller Portfolio
标准包装: 120
系列: PIC® XLP™ 12F
核心处理器: PIC
芯体尺寸: 8-位
速度: 32MHz
连通性: I²C,LIN,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 6
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: 闪存
EEPROM 大小: 256 x 8
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 8-VDFN 裸露焊盘
包装: 管件
243
7674F–AVR–09/09
ATmega164P/324P/644P
21. ADC - Analog-to-digital Converter
21.1
Features
10-bit Resolution
0.5 LSB Integral Non-linearity
±2 LSB Absolute Accuracy
65 - 260 s Conversion Time
Up to 15 kSPS at Maximum Resolution
8 Multiplexed Single Ended Input Channels
Differential mode with selectable gain at 1x, 10x or 200x(1)
Optional Left adjustment for ADC Result Readout
0 - V
CC ADC Input Voltage Range
2.7 - V
CC Differential ADC Voltage Range
Selectable 2.56V or 1.1V ADC Reference Voltage
Free Running or Single Conversion Mode
ADC Start Conversion by Auto Triggering on Interrupt Sources
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
Note:
1. Differential Mode is not recommended above 85°C.
21.2
Overview
The ATmega164P/324P/644P features a 10-bit successive approximation ADC. The ADC is
connected to an 8-channel Analog Multiplexer which allows 8 single-ended voltage inputs con-
structed from the pins of Port A. The single-ended voltage inputs refer to 0V (GND).
The device also supports 16 differential voltage input combinations. Two of the differential inputs
(ADC1, ADC0 and ADC3, ADC2) are equipped with a programmable gain stage. This provides
amplification steps of 0 dB (1x), 20 dB (10x), or 46 dB (200x) on the differential input voltage
before the A/D conversion. Seven differential analog input channels share a common negative
terminal (ADC1), while any other ADC input can be selected as the positive input terminal. If 1x
or 10x gain is used, 8-bit resolution can be expected. If 200x gain is used, 6-bit resolution can be
expected. Note that internal references of 1.1V should not be used on 200x gain.
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in Figure 21-1
The ADC has a separate analog supply voltage pin, AVCC. AVCC must not differ more than
±0.3 V from V
CC. See the paragraph “ADC Noise Canceler” on page 251 on how to connect this
pin.
Internal reference voltages of nominally 1.1V, 2.56V or AVCC are provided On-chip. The voltage
reference may be externally decoupled at the AREF pin by a capacitor for better noise
performance.
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