
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATMTraffic Management Device
Released
Datasheet
194
9.3.2
Multicast Control Block
Base address:400000
h
(1000000
h
byte)
Index:10
h
Entry number (refer to
“CH_RAM_CONFIG” on page 105
):
For CH_RAM_CONFIG = 0
h
, the entry number is from 0 to 8191.
For CH_RAM_CONFIG = 1
h
, the entry number is from 0 to 16385.
For CH_RAM_CONFIG = 2
h
, the entry number is from 0 to 32767.
For CH_RAM_CONFIG = 3
h
, the entry number is from 0 to 65534.
NOTE: The entry numbers listed above refer to a block of four words. Table 41 describes how four entries
fit into the space of one Channel Control Block (CCB). Each block of 16 words can be used for
either one CCB or four multicast control blocks.
Type: Read/Write
When multicasting in either direction, the long address = 400000
h
+
TX_CH_NEXT_MC_HEADER_PTR
×
4
h
(Refer to
“MC_HEADER_PTR” on page 177
).
Table 41. Multicast Control Block Summary
Byte
Address
Long
Offset
Name
Read or
Write
Description
0
h
0
h
MC_LIST
R/W
Multicast linked list.
4
h
1
h
MC_NEW_VPI_VCI
R/W
Multicast VPI/VCI to which you want to translate.
8
h
-C
h
2-3
h
Not used
R/W
Write with a 0 to maintain software compatibility
with future versions.
10
h
4
h
MC_LIST
R/W
Multicast linked list.
14
h
5
h
MC_NEW_VPI_VCI
R/W
Multicast VPI/VCI to which you want to translate.
18
h
-1C
h
6-7
h
Not used
R/W
Write with a 0 to maintain software compatibility
with future versions.
20
h
8
h
MC_LIST
R/W
Multicast linked list.
24
h
9
h
MC_NEW_VPI_VCI
R/W
Multicast VPI/VCI to which you want to translate.
28
h
-2C
h
A-B
h
Not used
R/W
Write with a 0 to maintain software compatibility
with future versions.
30
h
C
h
MC_LIST
R/W
Multicast linked list.
34
h
D
h
MC_NEW_VPI_VCI
R/W
Multicast VPI/VCI to which you want to translate.
38
h
-3C
h
E-F
h
Not used
R/W
Write with a 0 to maintain software compatibility
with future versions.