
PMC-Sierra, Inc.
PM73488 QSE
L
PMC-980616
Issue 3
5 Gbit/s ATMSwitch Fabric Element
Released
Datasheet
39
3
EXTERNAL PORT DESCRIPTIONS
3.1
Switch Fabric Port and Interface Description
Each port is a 6-bit interface consisting of:
a nibble-wide data interface (SE_D_IN and SE_D_OUT),
an SOC signal (SE_SOC_IN and SE_SOC_OUT), and
a backpressure/data acknowledge signal (BP_ACK_IN and BP_ACK_OUT).
3.1.1
SE_SOC Encodings
The SE_SOC encodings (SE_SOC_IN(31:0), SE_SOC_OUT(7:0)) provide guaranteed transitions and SOC encod-
ings.
The SE_SOC signals carry a repeating four “0s” and four “1s” pattern to guarantee transitions required by the phase
aligner. The SOC signal on data lines associated with an SE_SOC line is indicated by a break in this repeating pat-
tern. The SOC is a single “1” followed by five “0s”. Figure 27 shows the guaranteed transitions. Figure 28 provides
an expanded view of the signal transitions and the first nibble after the SOC pulse (nibble #0) corresponds to nibble
“0” in
Table 5 on page 40
.
Figure 27. SE_SOC Encodings
Figure 28. Expanded SE_SOC Encodings
Four 1s
Four 0s
Five 0s
Four 1s
Four 0s
Four 1s
Four 0s
Start Of Cell Pulse
SE_CLK
SE_SOC
#115. #116#117 #0
#1
Four 1s
Four 0s
One
Five 0s
Four 1s
Tsesu
Tseho
Tsesu
Start Of Cell Pulse
Magnified SE_CLK
SE_DATA
Magnified SE_SOC