参数资料
型号: Q80C32-30SHXXX:RD
厂商: TEMIC SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 30 MHz, MICROCONTROLLER, CQFP44
文件页数: 19/83页
文件大小: 8336K
194
7679H–CAN–08/08
AT90CAN32/64/128
17.10.1
MPCM Protocol
If the Receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indi-
cates if the frame contains data or address information. If the Receiver is set up for frames with
nine data bits, then the ninth bit (RXB8n) is used for identifying address and data frames. When
the frame type bit (the first stop or the ninth bit) is one, the frame contains an address. When the
frame type bit is zero the frame is a data frame.
The Multi-processor Communication mode enables several slave MCUs to receive data from a
master MCU. This is done by first decoding an address frame to find out which MCU has been
addressed. If a particular slave MCU has been addressed, it will receive the following data
frames as normal, while the other slave MCUs will ignore the received frames until another
address frame is received.
17.10.2
Using MPCM
For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZn = 7). The
ninth bit (TXB8n) must be set when an address frame (TXB8n = 1) or cleared when a data frame
(TXBn = 0) is being transmitted. The slave MCUs must in this case be set to use a 9-bit charac-
ter frame format.
The following procedure should be used to exchange data in Multi-processor Communication
mode:
1.
All Slave MCUs are in Multi-processor Communication mode (MPCMn in
UCSRnA is set).
2.
The Master MCU sends an address frame, and all slaves receive and read this frame.
In the Slave MCUs, the RXCn flag in UCSRnA will be set as normal.
3.
Each Slave MCU reads the UDRn Register and determines if it has been selected. If
so, it clears the MPCMn bit in UCSRnA, otherwise it waits for the next address byte and
keeps the MPCMn setting.
4.
The addressed MCU will receive all data frames until a new address frame is received.
The other Slave MCUs, which still have the MPCMn bit set, will ignore the data frames.
5.
When the last data frame is received by the addressed MCU, the addressed MCU sets
the MPCMn bit and waits for a new address frame from master. The process then
repeats from 2.
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the
Receiver must change between using N and N+1 character frame formats. This makes full-
duplex operation difficult since the Transmitter and Receiver use the same character size set-
ting. If 5- to 8-bit character frames are used, the Transmitter must be set to use two stop bit
(USBSn = 1) since the first stop bit is used for indicating the frame type.
相关PDF资料
PDF描述
Q80C32-36:R 8-BIT, 36 MHz, MICROCONTROLLER, CQFP44
Q80C32-36SHXXX:R 8-BIT, 36 MHz, MICROCONTROLLER, CQFP44
Q80C32-42:D 8-BIT, 42 MHz, MICROCONTROLLER, CQFP44
Q80C32-42:R 8-BIT, 42 MHz, MICROCONTROLLER, CQFP44
Q80C32-42SHXXX:D 8-BIT, 42 MHz, MICROCONTROLLER, CQFP44
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