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参数资料
| 型号： | RC7102 |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | SSOP-48 |
| 文件页数： | 3/16页 |
| 文件大小： | 72K |
| 代理商： | RC7102 |
PRODUCT SPECIFICATION
RC7102
11
Advanced
Infor
mation
Operation
Data is written to the RC7102 in eleven bytes of eight bits each. Bytes are written in the order shown in Table 4.
Table 4. Byte Writing Sequence
Byte
Sequence
Byte
Name
Bit
Sequence
Byte Description
1
Slave
Address
11010010
Commands the RC7102 to accept the bits in Data Bytes 0-6 for
internal register configuration. Since other devices may exist on the
same common serial data bus, it is necessary to have a specific slave
address for each potential receiver. The slave receiver address for the
RC7102 is 11010010. Register setting will not be made if the Slave
Address is not correct (or is for an alternate slave receiver).
2
Command
Code
Don’t Care
Unused by the RC7102, therefore bit values are ignored (don’t care).
This byte must be included in the data write sequence to maintain
proper byte allocation. The Command Code Byte is part of the
standard serial communication protocol and may be used when writing
to another addressed slave receiver on the serial data bus.
3
Byte Count
Don’t Care
Unused by the RC7102, therefore bit values are ignored (don’t care).
This byte must be included in the data write sequence to maintain
proper byte allocation. The Byte Count Byte is part of the standard
serial communication protocol and may be used when writing to
another addressed slave receiver on the serial data bus.
4
Data Byte 0
Refer to
Table 6
The data bits in Data Bytes 0-7 set internal RC7102 registers that
control device operation. The data bits are only accepted when the
Address Byte bit sequence is 11010010, as noted above. For
description of bit control functions, refer to Table 5, Data Byte Serial
Configuration Map.
5
Data Byte 1
6
Data Byte 2
7
Data Byte 3
8
Data Byte 4
9
Data Byte 5
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