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参数资料
| 型号： | RTC6581 |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | REAL TIME CLOCK, PDIP24 |
| 封装： | DIP-24 |
| 文件页数： | 17/35页 |
| 文件大小： | 591K |
| 代理商： | RTC6581 |
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EPSON
EPSON ELECTRONICS AMERICA, INC.
RTC-658X/RTC-659X
2. Register B:
MSB
LSB
BIT7
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 0
SET
PIE
AIE
UIE
SQWE
DM
24/12
DSE
(1) SET (Set: Read / Write)
When the SET bit is logic zero, the update transfer functions normally by advancing the real time clock value once
each second. When the SET bit is logic one, all update transfers are suspended and the program may initialized the
time and calendar bytes without an update occurring during the initialization.
For initialization of the RTC module, first set the SET bit to 1, then carry out the initialization. The UIP bit is held low
and the UIE bit is reset. Data read from the time and calendar bytes will be static as long as the SET bit is one. The
SET bit is a read/write bit that is not modified by RESET or internal functions of the RTC module. When the SET bit is
cleared to zero the clock wilt begin keeping the time again. This bit has no effect on the square wave output nor the
periodic interrupt.
(2) PIE (Periodic Interrupt Enable: Read/Write)
The Periodic Interrupt Enable (PIE) bit is a read/write bit which allows the Periodic interrupt Flag (PF) bit in Register C
to cause the IRQ pin to be driven low. When the PIE bit is set to one, periodic interrupts are generated by driving the
IRQ pin tow at the periodic interrupt rate specified by the RS3 through RS0 bits of Register A. A 0 in the PIE bit inhibits
the IRQ output from being driven by a periodic interrupt. PF is always set at the periodic interrupt rate regardless of
the state of the PIE bit. The PIE bit is not modified by any internal RTC module functions but is cleared by the
hardware RESET signal.
(3) AIE (Alarm Interrupt Enable: Read / Write)
The Alarm Interrupt Enable (AIE) bit is a read/write bit which when set to one, permits the Alarm Flag (AF) bit in
Register C to assert the IRQ signal. An alarm interrupt occurs for each second that the three alarm bytes (including
the “don't care alarm” codes) equal the three time bytes. When the AIE bit is set to zero, the AF bit does not assert the
IRQ signal. The AIE bit is not modified by any internal RTC module functions but is cleared by the hardware RESET
signal.
(4) UIE (Update Ended Interrupt Enable: Read / Write)
The Update ended Interrupt Enable (UIE) bit is a read/write bit, which when set to one, enables the Update end Flag
(UF) in Register C to assert the IRQ pin low. The RESET pin going low or the SET bit going high clears the UIE bit.
(5) SQWE (Square Wave Enable: Read / Write)
When the Square Wave Enable (SQWE) bit is set to one, a square wave signal at the rate selected by the rate
selection bits is output to the SOW pin. When the SQWE bit is set to 0, the SOW pin is held low. The RESET pin clears
the SQWE bit. The SQWE bit is a read/write bit.
(6) DM (Data Mode: Read / Write)
The Date Mode (DM) bit indicates whether the time, calendar and extended alarm information is in binary or BCD
format. The DM bit is set by only the program to the appropriate format and can be read as required. This bit is a
read/write bit, which is not modified by RESET or internal functions of the RTC module. Setting the DM bit to one
selects the binary date format while setting it to 0 selects the BCD format.
(7) 24/12 (24/12 Control: Read/Write)
The 24/12 control bit selects the format of the hours byte and also the hours byte of the extended alarm register. A
logic one selects the 24 hour mode and a logic 0 selects the 12 hour mode. This bit is a read/write bit, which is not
affected by RESET or internal functions of the RTC module.
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相关代理商/技术参数 |
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|---|---|
| RTC-6583 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| RTC-6587 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| RTC-6593 | 制造商:EPSON 制造商全称:EPSON 功能描述:REAL TIME CLOCK MODULE FOR PC/AT |
| RTC-6597 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| RTC6601 | 制造商:Richwave 功能描述:SP3T SWITCH, DFN 2x2-8L |
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