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参数资料
| 型号： | RTC6581 |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | REAL TIME CLOCK, PDIP24 |
| 封装： | DIP-24 |
| 文件页数： | 35/35页 |
| 文件大小： | 591K |
| 代理商： | RTC6581 |
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EPSON
EPSON ELECTRONICS AMERICA, INC.
RTC-658X/RTC-659X
(8) XALM -- Extended Alarm Select (For RTC-6591/6593/6597 only.)
The Extended Alarm Select signal must be asserted low for a bus cycle in which the extended alarm registers of the
module are to be accessed. XALM must be kept in the active state during DS and AS is High for Motorola timing and
during RD and WR is Low for Intel timing. Bus cycles, which take place without asserting XALM, will latch addresses
but no access will occur. When VDD is below VENABLE, the module internally inhibits access cycles by internally
disabling the XALM input. This action protects the extended alarm data during power outages.
This pin is provided with an internal pull-up resistor.
(9) IRQ -- Interrupt Request (output)
The IRQ signal is an active low, open drain output that is used as a processor interrupt request. The IRQ output
follows the state of the interrupt pending bit (bit 7) in status register C. IRQ may be asserted by the alarm, update
ended or periodic interrupt functions depending on the configuration of register B.
(10) XIRQ -- Extended alarm interrupt request (For RTC-6591/6593/6597 only.)
The XIRQ signal is an active low, open drain output that is used as a processor interrupt request. XIRQ may be
asserted by the extended alarm functions depending on the configuration of extended alarm register 6 and 7.
This pin is active even during backup by a battery.
(11) RESET -- Reset (input):
The reset signal is used to initialize certain registers to allow proper operation of the module. When RESET is low, the
following occurs:
The following register bits are cleared:
a. Periodic interrupt enable (PIE).
b. Alarm interrupt enable (AIE).
c. Updates ended interrupt (UF).
d. Interrupt request flag (IRQF).
e. Periodic interrupts flag (PF).
f. Alarm interrupts flag (AF).
g. Square wave output enables (SQWE).
h. Update ended interrupts enable (UIE).
- The IRQ pin is in the high impedance state.
The module is not processor accessible.
(12) VBAT -- Back-up power supply (RTC-6583/6593, RTC-6587/6597 only. Input)
The VBAT pin supplies the device with power while the system is powered off or in stand-by mode. This input is
designed for a 3.0V lithium battery.
VENABLE (Internal chip enable voltage) = VBAT x 1.3[V](TYP.)
VCHECK (VRT bit threshold voltage) - 2.50V (TYP.)
VBAT operation current = 1000 nA (MAX.), 500 nA (TYP.)
This device is optimised for a lithium battery. If an another power source is used the application must not allow the
charging voltage at VBAT pin to exceed VBAT x 1.3(TYP.).
If the voltage on the VBAT pin is too great, the device's internal chip enable circuit disallows access to the device.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RTC-6583 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| RTC-6587 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| RTC-6593 | 制造商:EPSON 制造商全称:EPSON 功能描述:REAL TIME CLOCK MODULE FOR PC/AT |
| RTC-6597 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| RTC6601 | 制造商:Richwave 功能描述:SP3T SWITCH, DFN 2x2-8L |
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