- 您现在的位置：买卖IC网 > PDF目录69321 > RTPXA270C5C520 (INTEL CORP) 32-BIT, 520 MHz, RISC PROCESSOR, PBGA356 PDF资料下载
参数资料
| 型号： | RTPXA270C5C520 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 520 MHz, RISC PROCESSOR, PBGA356 |
| 封装： | 13 X 13 MM, 1.0MM PITCH, LEAD FREE, VFBGA-356 |
| 文件页数： | 27/44页 |
| 文件大小： | 1302K |
| 代理商： | RTPXA270C5C520 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页当前第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页
Electrical Specifications
Intel PXA255 Processor Electrical, Mechanical, and Thermal Specification
33
4.7.5
Sleep Mode Timing
Sleep mode is asserted internally; and asserts the nRESET_OUT and PWR_EN signals. The
sequence indicated in Figure 6, “Sleep Mode Timing” on page 34 and detailed in Figure 18, “Sleep
Mode Timing Specifications” on page 34 is the required timing parameters for sleep mode.
Figure 5. GPIO Reset Timing
Table 17. GPIO Reset Timing Specifications
Symbol
Description
Min
Typical
Max
Units
tA_GP[1]
Minimum assert time of GP[1]1 in
3.6864MHz input clock cycles
4
cycles
tDHW_OUT_A
Delay between GP[1] asserted and
nRESET_OUT asserted in 3.6864 MHz
input clock cycles
3
8
cycles
tDHW_OUT
Delay between nRESET_OUT asserted
and nRESET_OUT de-asserted, run or
turbo mode2
1.28
6.5
s
tDHW_OUT_F
Delay between nRESET_OUT asserted
and nRESET_OUT de-asserted, during
frequency change sequence3
1.28
360
s
tDHW_NCS0
Delay between nReset_Out de-asserted
and nCS0 asserted
150.69
—
390
ns
NOTES:
1. GP[1] is not recognized as a reset source again until configured to do so in software. Software should
check the state of GP[1] before configuring as a reset to ensure no spurious reset is generated.
2. Time is 512*N processor clock cycles plus up to 4 cycles of the 3.6864-MHz input clock.
3. Time during the frequency change sequence depends on the state of the PLL lock detector at the
assertion of GPIO reset. The lock detector has a maximum time of 350s plus synchronization.
GP[1]
nRESET_OUT
t
DHW_OUT
t
A_GP[1]
t
DHW_OUT_A
Note: nBATT_FAULT and nVDD_FAULT must be high before nRESET is
deasserted or the application processor will enter Sleep Mode
相关PDF资料 |
PDF描述 |
|---|---|
| RCPXA272FC0520 | 520 MHz, MICROPROCESSOR, PBGA336 |
| RCPXA273FC0416 | 416 MHz, MICROPROCESSOR, PBGA336 |
| RCPXA273FC0520 | 520 MHz, MICROPROCESSOR, PBGA336 |
| RCPXA272FC0312 | 312 MHz, MICROPROCESSOR, PBGA336 |
| RCPXA271FC0312 | 312 MHz, MICROPROCESSOR, PBGA336 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RTPXA270C5C624 | 功能描述:IC MPU 32BIT 624MHZ 356-PBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:- 标准包装:1 系列:MPC85xx 处理器类型:32-位 MPC85xx PowerQUICC III 特点:- 速度:1.2GHz 电压:1.1V 安装类型:表面贴装 封装/外壳:783-BBGA，FCBGA 供应商设备封装:783-FCPBGA（29x29） 包装:托盘 |
| RTPXA320B1C624-180 | 制造商:Marvell 功能描述:MONAHANS P 624MHZ - Trays |
| RTPXA320B1C624-203 | 制造商:Marvell 功能描述:MONAHANS P 624MHZ - Trays |
| RTPXA320B1C624-208 | 制造商:Marvell 功能描述:MONAHANS P 624MHZ - Trays |
| RTPXA320B1C624-209 | 制造商:Marvell 功能描述:MONAHANS P 624MHZ - Trays |
发布紧急采购，3分钟左右您将得到回复。