1 Overview
1-8
Seiko Epson Corporation
S1C17601 TECHNICAL MANUAL
1.3.2 Pin Descriptions
Table 1.3.2.1: Pin descriptions
PAD/Pin/Ball No.
Name
I/O
Default
status
Function
CHIP
TQFP
VFBGA
1
B2
DSIO/P25
I/O
I(Pull-UP) On-chip debugger data I/O1/I/O common port
2
B1
DST2/P26
I/O
O(L)
On-chip debugger status output1/I/O common port
4
3
C1
DCLK/P27
I/O
O(H)
On-chip debugger clock output1/I/O common port
6
4-19
2
SEG0-15
O
O(L)
LCD segment output
7
20-23
3
COM7-4/
SEG16-19
O
O(L)
LCD common output1 /LCD segment output
7
24-27
3
COM3-0
O
O(L)
LCD common output
43
-
J6
TEST3
-
Test pin (open it)
44
-
H6
TEST2
-
Test pin (open it)
45
-
G6
TEST1
-
Test pin (open it)
46
28
H7
CB
-
LCD booster capacitor connector
47
29
J7
CA
-
LCD booster capacitor connector
48
30
G7
VC3
-
LCD circuit drive voltage output
49
31
J8
VC2
-
LCD circuit drive voltage output
50
32
H8
VC1
-
LCD circuit drive voltage output
51
-
4
VSS
-
Power supply ( )
52
33
5
VDD
-
Power supply (+)
53
34
H9
OSC4
O
OSC3 oscillator output
54
35
G9
OSC3
I
OSC3 oscillator input (external clock input of VDD VSS level is
also available)
55
-
4
VSS
-
Power supply ( )
36
F9
VD1
-
Internal logic and oscillator circuit constant-voltage circuit output
57
37
E8
OSC2
O
OSC1 oscillator output
58
38
E9
OSC1
I
OSC1 oscillator input
61
39
F7
#RESET
I
I(Pull-UP) Initial set input
64
40
E7
#TEST
I
I(Pull-UP) Test pin (fixed to VDD)
67
41
D9
P00/RFCLKO/
LFRO
I/O
I(Pull-UP) I/O common port (with inturrupt)1/RF clock monitor/LCD flame
output
69
42
D8
P01/TOUTN4
I/O
I(Pull-UP) I/O common port (with inturrupt)1/T16E Ch1 PWM signal output
(inverted)
72
43
D7
P02/TOUT4/
EXCL0
I/O
I(Pull-UP) I/O common port (with inturrupt)1/T16E Ch1 PWM signal output
(non-inverted)/T16 Ch0 external clock input
74
44
C9
P03/#ADTRG
I/O
I(Pull-UP) I/O common port (with inturrupt)1/ A/D convert external trigger
76
45
D8
P04/AIN3/
EXCL1
I/O
I(Pull-UP) I/O common port (with inturrupt)1/A/D converter Ch3 input/T16
Ch1 external clock input
78
46
B9
P05/AIN2/
EXCL2
I/O
I(Pull-UP) I/O common port (with inturrupt)1/A/D converter Ch2 input/T16
Ch2 external clock input
79
47
4
VSS
-
Power supply ( )
80
48
C7
AVDD
-
Analog power supply (+)
81
49
A8
P06/AIN1/
EXCL3
I/O
I(Pull-UP) I/O common port (with inturrupt)1/A/D converter Ch1 input/
T16E Ch0 external clock input
82
50
B8
P07/AIN0/
EXCL4
I/O
I(Pull-UP) I/O common port (with inturrupt)1/A/D converter Ch0 input/
T16E Ch1 external clock input
83
51
B7
P10/SCL0/
SCL1
I/O
I(Pull-UP) I/O common port (with inturrupt)1/I2C master clock output/I2C
slave clock input
84
52
A7
P11/SDA0/
SDA1
I/O
I(Pull-UP) I/O common port (with inturrupt)1/I2C master data I/O/I2C slave
data I/O
86
53
4
VDD
-
Power supply (+)
87
54
B6
P12/SENB/
#BFR
I/O
I(Pull-UP) I/O common port (with inturrupt)1/for R/F converter/I2C slave
bus open
88
55
A6
P13/SENA/
SDA1
I/O
I(Pull-UP) I/O common port (with inturrupt)1/for R/F converter/I2C slave
data I/O
89
56
B5
P14/REF/SCL1 I/O
I(Pull-UP) I/O common port (with inturrupt)1/for R/F converter/I2C slave
clock input
90
57
A5
P15/RFIN
I/O
I(Pull-UP) I/O common port (with inturrupt)1/for R/F converter
91
-
4
VSS
-
Power supply ( )
92
58
A4
P16/FOUT1
I/O
I(Pull-UP) I/O common port (with inturrupt)1/OSC1 external clock output
94
59
B4
P17/SPICLK/
SCLK
I/O
I(Pull-UP) I/O common port (with inturrupt)1/SPI clock I/O/UART clock
input
95
60
C4
P20/SDO/
SOUT
I/O
I(Pull-UP) I/O common port1/SPI data output/UART data output