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S29AL032D
S29AL032D_00_A3 June 13, 2005
Advan ce
In form ati o n
The internal state machine is set for reading array data upon device power-up, or after a hardware
reset. This ensures that no spurious alteration of the memory content occurs during the power
transition. No command is necessary in this mode to obtain array data. Standard microprocessor
read cycles that assert valid addresses on the device address inputs produce valid data on the
device data outputs. The device remains enabled for read access until the command register con-
tents are altered.
in the DC Characteristics table represents the active current specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data to the device and
erasing sectors of memory), the system must drive WE# and CE# to VIL, and OE# to VIH.
For program operations, the BYTE# pin determines whether the device accepts program data in
information.
The device features an Unlock Bypass mode to facilitate faster programming. Once the device
enters the Unlock Bypass mode, only two write cycles are required to program a word or byte,
programming data to the device using both standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 2 on page 14and Table 4 on page 16 indicate the address space that each sector occupies. A sector address page 31 contains details on erasing a sector or the entire chip, or suspending/resuming the erase
operation.
After the system writes the autoselect command sequence, the device enters the autoselect
mode. The system can then read autoselect codes from the internal register (which is separate
from the memory array) on DQ7–DQ0. Standard read cycle timings apply in this mode. Refer to
information.
ICC2 in the DC Characteristics table represents the active current specification for the write mode.
operations.
Program and Erase Operation Status
During an erase or program operation, the system may check the status of the operation by read-
ing the status bits on DQ7–DQ0. Standard read cycle timings and ICC read specifications apply.
Accelerated Program Operation
The device offers accelerated program operations through the ACC function. This is one of two
functions provided by the WP#/ACC (ACC on Model 00) pin. This function is primarily intended to
allow faster manufacturing throughput at the factory.
If the system asserts VHH on this pin, the device automatically enters the aforementioned Unlock
Bypass mode, temporarily unprotects any protected sectors, and uses the higher voltage on the
pin to reduce the time required for program operations. The system would use a two-cycle pro-
gram command sequence as required by the Unlock Bypass mode. Removing VHH from the WP#/
ACC pin returns the device to normal operation. Note that the WP#/ACC pin must not be at VHH
for operations other than accelerated programming, or device damage may result. In addition,