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参数资料
| 型号： | S29CD016G0MFAN002 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| 中文描述： | 512K X 32 FLASH 2.7V PROM, 64 ns, PBGA80 |
| 封装： | 13 X 11 MM, 1 MM PITCH, FORTIFIED, BGA-80 |
| 文件页数： | 26/81页 |
| 文件大小： | 1276K |
| 代理商： | S29CD016G0MFAN002 |
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30
S29CD-G Flash Family
S29CD-G_00_B1 March 3, 2009
Data
Sheet
(Pre limin ar y)
12.11.9
Burst Data Hold Control
The device is capable of holding data for one CLKs. The default configuration is to hold data for one CLK and
is the only valid state.
12.11.10 Asserting RESET# During A Burst Access
If RESET# is asserted low during a burst access, the burst access is immediately terminated and the device
defaults back to asynchronous read mode. See Hardware Reset (RESET#) on page 66 for more information
on the RESET# function.
12.12 Configuration Register
The device contains a Configuration Register for configuring read accesses. The Configuration Register is
accessed by the Configuration Register Read and the Configuration Register Write commands. The
Configuration Register does not occupy any addressable memory location, but rather, is accessed by the
Configuration Register commands. The Configuration Register is readable any time, however, writing the
Configuration Register is restricted to times when the Embedded Algorithm is not active. If the user
attempts to write the Configuration Register while the Embedded Algorithm is active, the write operation is
ignored and the contents of the Configuration Register remain unchanged.
The Configuration Register is a 16 bit data field which is accessed by DQ15–DQ0. During a read operation,
DQ31–DQ16 returns all zeroes. Table 12.7 shows the Configuration Register. Also, Configuration Register
reads operate the same as Autoselect command reads. When the command is issued, the bank address is
latched along with the command. Reads operations to the bank that was specified during the Configuration
Register read command return Configuration Register contents. Read operations to the other bank return
flash memory data. Either bank address is permitted when writing the Configuration Register read command.
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| S29CD032G0JFFN002 | 1M X 32 FLASH 2.7V PROM, 67 ns, PBGA80 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| S29CD016G0MFAN003 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| S29CD016G0MFAN010 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| S29CD016G0MFAN011 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| S29CD016G0MFAN012 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| S29CD016G0MFAN013 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
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