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参数资料
型号： S29CD016G0MFAN002
厂商： SPANSION LLC
元件分类： PROM
英文描述： 16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
中文描述： 512K X 32 FLASH 2.7V PROM, 64 ns, PBGA80
封装： 13 X 11 MM, 1 MM PITCH, FORTIFIED, BGA-80
文件页数： 27/81页
文件大小： 1276K
代理商： S29CD016G0MFAN002
March 3, 2009 S29CD-G_00_B1
S29CD-G Flash Family
31
Da ta
Shee t
(Prelim i nar y )
Table 12.7 Configuration Register Definitions
CR15
CR14
CR13
CR12
CR11
CR10
CR9
CR8
RM
ASD
IAD3
IAD2
IAD1
IAD0
DOC
WC
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
BS
CC
Reserved
BL2
BL1
BL0
Configuration Register
CR15 = Read Mode (RM)
0 = Synchronous Burst Reads Enabled
1 = Asynchronous Reads Enabled (Default)
CR14 = Reserved for Future Enhancements
0 = ASM enable
1 = ASM disable
CR13–CR10 = Automatic Sleep Mode Disable
Speed Options 40, 56, and 66 MHz:
0000 = 2 CLK cycle initial burst access delay
0001 = 3 CLK cycle initial burst access delay
0010 = 4 CLK cycle initial burst access delay
0011 = 5 CLK cycle initial burst access delay
0100 = 6 CLK cycle initial burst access delay
0101 = 7 CLK cycle initial burst access delay
0110 = 8 CLK cycle initial burst access delay
0111 = 9 CLK cycle initial burst access delay—Default
CR9 = Data Output Configuration (DOC)
0 = Hold Data for 1-CLK cycle—Default
1 = Reserved
CR8 = IND/WAIT# Configuration (WC)
0 = IND/WAIT# Asserted During Delay—Default
1 = IND/WAIT# Asserted One Data Cycle Before Delay
CR7 = Burst Sequence (BS)
0 = Reserved
1 = Linear Burst Order—Default
CR6 = Clock Configuration (CC)
0 = Reserved
1 = Burst Starts and Data Output on Rising Clock Edge—Default
CR5–CR3 = Reserved For Future Enhancements (R)
These bits are reserved for future use. Set these bits to 0.
CR2–CR0 = Burst Length (BL2–BL0)
000 = Reserved, burst accesses disabled (asynchronous reads only)
001 = 64 bit (8-byte) Burst Data Transfer - x32 Linear
010 = 128 bit (16-byte) Burst Data Transfer - x32 Linear
011 = 256 bit (32-byte) Burst Data Transfer - x32 Linear (device default)
100 = Reserved, burst accesses disabled (asynchronous reads only)
101 = Reserved, burst accesses disabled (asynchronous reads only)
110 = Reserved, burst accesses disabled (asynchronous reads only)
Table 12.8 Configuration Register After Device Reset
CR15
CR14
CR13
CR12
CR11
CR10
CR9
CR8
RM
Reserve
IAD3
IAD2
IAD1
IAD0
DOC
WC
1
0011
1
0
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
BS
CC
Reserve
BL2
BL1
BL0
1
1000
1
0
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S29CD016G0MFAN003 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
S29CD016G0MFAN010 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
S29CD016G0MFAN011 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
S29CD016G0MFAN012 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
S29CD016G0MFAN013 制造商:SPANSION 制造商全称:SPANSION 功能描述:16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
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