Chapter 1 MC9S12HZ256 Device Overview
MC9S12HZ256 Data Sheet, Rev. 2.05
22
Freescale Semiconductor
Memory
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256K, 128K, 64K, 32K Flash EEPROM or ROM
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2K, 1K byte EEPROM
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12K, 6K, 4K, 2K byte RAM
CRG (low current oscillator, PLL, reset, clocks, COP watchdog, real time interrupt, clock monitor)
Analog-to-digital converter
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16 channels, 10-bit resolution
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External conversion trigger capability
Two 1-Mbps, CAN 2.0 A, B software compatible modules
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Five receive and three transmit buffers
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Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8x8bit
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Four separate interrupt channels for Rx, Tx, error and wake-up
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Low-pass filter wake-up function
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Loop-back for self test operation
Timer
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16-bit main counter with 7-bit prescaler
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8 programmable input capture or output compare channels
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Two 8-bit or one 16-bit pulse accumulators
6 PWM channels
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Programmable period and duty cycle
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8-bit 6-channel or 16-bit 3-channel
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Separate control for each pulse width and duty cycle
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Center-aligned or left-aligned outputs
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Programmable clock select logic with a wide range of frequencies
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Fast emergency shutdown input
Serial interfaces
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Two asynchronous serial communications interfaces (SCI)
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Synchronous serial peripheral interface (SPI)
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Inter-integrated circuit interface (IIC)
Liquid crystal display (LCD) driver with variable input voltage
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Configurable for up to 32 frontplanes and 4 backplanes or general-purpose input or output
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5 modes of operation allow for different display sizes to meet application requirements
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Unused frontplane and backplane pins can be used as general-purpose I/O
PWM motor controller (MC) with 16 high current drivers
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Each PWM channel switchable between two drivers in an H-bridge configuration
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Left, right and center aligned outputs
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Support for sine and cosine drive
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Dithering
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Output slew rate control