参数资料
型号: SC9RS08KA1J3CDB
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO6
封装: 3 X 3 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, DFN-6
文件页数: 4/134页
文件大小: 3114K
代理商: SC9RS08KA1J3CDB
Chapter 12 Development Support
SC9RS08KA2 Series Data Sheet, Rev. 1
Freescale Semiconductor
101
Figure 12-4. BDC Target-to-Host Serial Bit Timing (Logic 1)
Figure 12-5 shows the host receiving a logic 0 from the target MCU. Because the host is asynchronous to
the target, there is a 0-to-1 cycle delay from the host-generated falling edge on BKGD to the start of the
bit time as perceived by the target. The host initiates the bit time but the target finishes it. Because the target
wants the host to receive a logic 0, it drives the BKGD pin low for 13 BDC clock cycles, then briefly drives
it high to speed up the rising edge. The host samples the bit level approximately 10 cycles after starting
the bit time.
HOST SAMPLES BKGD PIN
10 CYCLES
BDC CLOCK
(TARGET MCU)
HOST DRIVE
TO BKGD PIN
TARGET MCU
SPEEDUP PULSE
PERCEIVED START
OF BIT TIME
HIGH IMPEDANCE
BKGD PIN
R-C RISE
10 CYCLES
EARLIEST START
OF NEXT BIT
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