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| 型号： | SC9RS08KA1J3CDB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO6 |
| 封装： | 3 X 3 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, DFN-6 |
| 文件页数： | 8/134页 |
| 文件大小： | 3114K |
| 代理商： | SC9RS08KA1J3CDB |
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Chapter 12 Development Support
SC9RS08KA2 Series Data Sheet, Rev. 1
Freescale Semiconductor
105
12.5
RS08 BDC Commands
BDC commands are sent serially from a host computer to the BKGD pin of the target MCU. All commands
and data are sent MSB-first using a custom BDC communications protocol. Active background mode
commands require that the target MCU is currently in the active background mode while non-intrusive
commands may be issued at any time whether the target MCU is in active background mode or running a
user application program.
Table 12-2 shows all RS08 BDC commands, a shorthand description of their coding structure, and the
meaning of each command.
Coding Structure Nomenclature
The following nomenclature is used in Table 12-2 to describe the coding structure of the BDC commands.
Commands begin with an 8-bit command code in the host-to-target direction
(most significant bit first)
/
=
Separates parts of the command
d
=
Delay 16 to 511 target BDC clock cycles
soft-reset
=
Delay of at least 512 BDC clock cycles from last host falling-edge
AAAA
=
16-bit address in the host-to-target direction1
RD
=
Eight bits of read data in the target-to-host direction
WD
=
Eight bits of write data in the host-to-target direction
RD16
=
16 bits of read data in the target-to-host direction
WD16
=
16 bits of write data in the host-to-target direction
SS
=
the contents of BDCSCR in the target-to-host direction (STATUS)
CC
=
Eight bits of write data for BDCSCR in the host-to-target direction (CONTROL)
RBKP
=
16 bits of read data in the target-to-host direction (from BDCBKPT breakpoint
register)
WBKP
=
16 bits of write data in the host-to-target direction (for BDCBKPT breakpoint
register)
15
14
13
12
11
10
9
8765
4321
0
R0
0
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
W
Any
Reset
0
0000
000
0000
= Unimplemented or Reserved
Figure 12-7. BDC Breakpoint Match Register (BDCBKPT)
1. The RS08 CPU uses only 14 bits of address and occupies the lower 14 bits of the 16-bit AAAA address field. The values of
address bits 15 and 14 in AAAA are truncated and thus do not matter.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SC9RS08KA1J3CPC | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:RS08 Microcontrollers |
| SC9RS08KA1J3CSC | 制造商:Freescale Semiconductor 功能描述:8-BIT RS08 CISC 1KB FLASH 2.5V/3.3V/5V 8-PIN SOIC N RAIL - Rail/Tube 制造商:Freescale Semiconductor 功能描述:1K FLASH W/ ACMP 62 RAM |
| SC9RS08KA2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:RS08 Microcontrollers |
| SC9RS08KA2J3CDB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:RS08 Microcontrollers |
| SC9RS08KA2J3CPC | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:RS08 Microcontrollers |
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