收藏本站
参数资料
型号： SSTUG32868ET/G
厂商： NXP SEMICONDUCTORS
元件分类： 锁存器
英文描述： 32868 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA176
封装： 6 X 15 MM, 0.70 MM PITCH, LEAD FREE, PLASTIC, MO-246, SOT932-1, TFBGA-176
文件页数： 8/29页
文件大小： 166K
代理商： SSTUG32868ET/G
SSTUG32868_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 23 April 2007
16 of 29
NXP Semiconductors
SSTUG32868
1.8 V DDR2-1G congurable registered buffer with parity
8.
Limiting values
[1]
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
This value is limited to 2.5 V maximum.
9.
Recommended operating conditions
[1]
The differential inputs must not be oating, unless RESET is LOW.
[2]
The RESET input of the device must be held at valid logic levels (not oating) to ensure proper device operation.
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
supply voltage
0.5
+2.5
V
VI
input voltage
receiver
[1][2]
0.5
+2.5
V
VO
output voltage
driver
[1][2]
0.5
VDD + 0.5
V
IIK
input clamping current
VI < 0 V or VI >VDD
-
±50
mA
IOK
output clamping current
VO < 0 V or VO >VDD
-
±50
mA
IO
output current
continuous; 0 V < VO < VDD
-
±50
mA
IDDC
continuous current through
each VDD or GND pin
-
±100
mA
Tstg
storage temperature
65
+150
°C
Vesd
electrostatic discharge
voltage
Human Body Model (HBM); 1.5 k
; 100 pF
2
-
kV
Machine Model (MM); 0
; 200 pF
200
-
V
Table 7.
Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD
supply voltage
1.7
-
2.0
V
Vref
reference voltage
0.49
× VDD 0.50 × VDD 0.51 × VDD V
VT
termination voltage
Vref 0.040 Vref
Vref + 0.040 V
VI
input voltage
0
-
VDD
V
VIH(AC)
AC HIGH-level input voltage
Dn and PAR_IN inputs
[1] Vref + 0.250 -
-
V
VIL(AC)
AC LOW-level input voltage
Dn and PAR_IN inputs
[1] --
Vref 0.250 V
VIH(DC)
DC HIGH-level input voltage
Dn and PAR_IN inputs
[1] Vref + 0.125 -
-
V
VIL(DC)
DC LOW-level input voltage
Dn and PAR_IN inputs
[1] --
Vref 0.125 V
VIH
HIGH-level input voltage
RESET, CSGEN
[2] 0.65
× VDD --
V
VIL
LOW-level input voltage
RESET, CSGEN
[2] -
-
0.35
× VDD V
VICR
common mode input voltage
range
CK, CK
0.675
-
1.125
V
VID
differential input voltage
CK, CK
600
-
mV
IOH
HIGH-level output current
-
8mA
IOL
LOW-level output current
-
8
mA
Tamb
ambient temperature
operating in free air
SSTUG32868ET/G
0
-
+70
°C
SSTUG32868ET/S
0
-
+85
°C
相关PDF资料
PDF描述
SSTUP32866EC/S 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
SSTV16857EC POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA56
SSTV16859DGG,118 SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO64
SSTV16859BS,118 SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PQCC56
SSTV16859EC,518 SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96
相关代理商/技术参数
参数描述
SSTUG32868ETS 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications
SSTUG32868G 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications
SSTUH32864 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:1.8 V high output drive configurable registered buffer for DDR2 RDIMM applications
SSTUH32864EC 功能描述:寄存器 1.8V CONFIG REG BUFFER/DDRII RoHS:否 制造商:NXP Semiconductors 逻辑类型:CMOS 逻辑系列:HC 电路数量:1 最大时钟频率:36 MHz 传播延迟时间: 高电平输出电流:- 7.8 mA 低电平输出电流:7.8 mA 电源电压-最大:6 V 最大工作温度:+ 125 C 封装 / 箱体:SOT-38 封装:Tube
SSTUH32864EC,518 功能描述:寄存器 1.8V CONFIG REG RoHS:否 制造商:NXP Semiconductors 逻辑类型:CMOS 逻辑系列:HC 电路数量:1 最大时钟频率:36 MHz 传播延迟时间: 高电平输出电流:- 7.8 mA 低电平输出电流:7.8 mA 电源电压-最大:6 V 最大工作温度:+ 125 C 封装 / 箱体:SOT-38 封装:Tube
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*