参数资料
型号: ST10F269DIETR
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, UUC
封装: DIE
文件页数: 34/161页
文件大小: 1595K
代理商: ST10F269DIETR
ST10F269-T3
129/160
xxIC (yyyyh / zzh)
SFR Area
ResetValue:--00h
XPERCON (F024h / 12h)
ESFR
Reset Value: --05h
15
14
13
12
11
10
9876543210
--------
xxIR
xxIE
ILVL
GLVL
RW
Bit
Function
GLVL
Group Level
Defines the internal order for simultaneous requests of the same priority.
3: Highest group priority
0: Lowest group priority
ILVL
Interrupt Priority Level
Defines the priority level for the arbitration of requests.
Fh: Highest priority level
0h: Lowest priority level
xxIE
Interrupt Enable Control Bit (individually enables/disables a specific source)
‘0’: Interrupt Request is disabled
‘1’: Interrupt Request is enabled
xxIR
Interrupt Request Flag
‘0’: No request pending
‘1’: This source has raised an interrupt request
15
14
13
12
11
10
9
8
7
6
5
4
3210
-
----
---
-
--
RTCEN
XRAM2EN
XRAM1EN
CAN2EN
CAN1EN
RW
CAN1EN
CAN1 Enable Bit
‘0’: Accesses to the on-chip CAN1 XPeripheral and its functions are disabled. P4.5 and P4.6 pins can be
used as general purpose I/Os. Address range 00’EF00h-00’EFFFh is only directed to external memory if
CAN2EN is also ‘0’.
‘1’: The on-chip CAN1 XPeripheral is enabled and can be accessed.
CAN2EN
CAN2 Enable Bit
‘0’: Accesses to the on-chip CAN2 XPeripheral and its functions are disabled. P4.4 and P4.7 pins can be
used as general purpose I/Os. Address range 00’EE00h-00’EEFFh is only directed to external memory if
CAN1EN is also ‘0’.
‘1’: The on-chip CAN2 XPeripheral is enabled and can be accessed.
XRAM1EN
XRAM1 Enable Bit
‘0’: Accesses to external memory within space 00’E000h to 00’E7FFh. The 2K Bytes of internal XRAM1
are disabled.
’1’: Accesses to the internal 2K Bytes of XRAM1.
XRAM2EN
XRAM2 Enable Bit
‘0’: Accesses to the external memory within space 00’C000h to 00’DFFFh. The 8K Bytes of internal
XRAM2 are disabled.
’1’: Accesses to the internal 8K Bytes of XRAM2.
RTCEN
RTC Enable Bit
’0’: Accesses to the on-chip Real Time Clock are disabled, external access performed. Address range
00’EC00h-00’ECFFh is only directed to external memory if CAN1EN and CAN2EN are ’0’ also
’1’: The on-chip Real Time Clock is enabled and can be accessed.
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