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MOTOR CONTROLLER (Cont’d)
10.6.6.2 Sensorless Mode
This mode is used to detect BEMF zero crossing
and end of demagnetization events.
The analog phase multiplexer connects the non-
excited motor winding to an analog 100mV hyster-
esis comparator referred to a selectable reference
voltage.
IS[1:0] bits in MPHST register allow to select the
input which will be drive to the comparator (either
MCIA, B or C). Be careful that the comparator is
OFF until CKE and/or DAC bit are set in MCRA
register.
The VR[2:0] bits in the MCRC register select the
reference voltage from seven internal values de-
pending on the noise level and the application volt-
age supply. The reference voltage can also be set
externally through the MCVREF pin when the
VR[2:0] bits are set.
Table 25. Threshold voltage setting
*Typical value for VDD=5V.
BEMF detections are performed during the meas-
urement window, when the excited windings are
free-wheeling through the low side switches and
diodes. At this stage the common star connection
voltage is near to ground voltage (instead of VDD/2
when the excited windings are powered) and the
complete BEMF voltage is present on the non-ex-
cited winding terminal, referred to the ground ter-
minal.
The zero crossing sampling frequency is then de-
fined, in current mode, by the measurement win-
dow generator frequency (SA[3:0] bits in the
MPRSR register) or, in voltage mode, by the PWM
generator frequency and phase U duty cycle.
During a short period after a phase commutation
(C event), the winding where the back-emf will be
read is no longer excited but needs a demagneti-
sation phase during which the BEMF cannot be
read. A demagnetization current goes through the
free-wheeling diodes and the winding voltage is
stuck at the high voltage or to the ground terminal.
For this reason an “end of demagnetization event”
D must be detected on the winding before the de-
tector can sense a BEMF zero crossing.
For the end-of-demagnetization detection, no spe-
cial PWM configuration is needed, the comparator
sensing is done at a selectable frequency (fSCF),
So, the three events: C (commutation), D (demag-
netization) and Z (BEMF zero crossing) must al-
ways occur in this order in autoswitched mode
when hard commutation is selected.
The comparator output is processed by a detector
that automatically recognizes the D or Z event, de-
pending on the CPB or ZVD edge and level config-
To avoid wrong detection of D and Z events, a
blanking window filter is implemented for spike fil-
tering. In addition, by means of an event counter,
software can filter several consecutive events up
to a programmed limit before generating the D or Z
event internally. This is shown in
Figure 79 and
VR2
VR1
VR0
Vref voltage threshold
111
Threshold voltage set by
external MCVREF pin
1
0
3.5V*
1
0
1
2.5V*
100
2V*
0
1
1.5V*
010
1V*
0
1
0.6V*
0
0.2V*
1