![](http://datasheet.mmic.net.cn/120000/ST7MC1K2T6-XXX_datasheet_3577044/ST7MC1K2T6-XXX_15.png)
ST7MC1/ST7MC2
15/308
Notes:
1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up
column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,
else the configuration is floating interrupt input.
2. If two alternate function outputs are enabled at the same time on a given pin (for instance, MCPWMV
and MCDEM on PD1 on LQFP32), the two signals will be ORed on the output pin.
3. MCES is a floating input. To disable this function, a pull-up resistor must be used.
4. OSC1 and OSC2 pins connect a crystal/ceramic resonator or an external source to the on-chip oscilla-
more details.
5. MCCFI can be mapped on 2 different pins on 80 ,64 and 56-pin packages. This allows:
- either to use PC1 as a standard I/O and map MCCFI on OAZ (MCCFI1) with or without using the oper-
ational amplifier (selected case after reset),
- or to map MCCFI on PC1 (MCCFI0) and use the amplifier for another function.
The mapping can be selected in MREF register of motor control cell. See section MOTOR CONTROL for
more details.
6. MCZEM is mapped on PF1 on 80, 64 and 56-pin packages and on PD2 on 44 and 32-pins.
MCDEM is mapped on PF0 on 80, 64 and 56-pin packages and on PD1 on 44 and 32-pin packages.
7. MCPWMV is mapped on PC6 on 80 and 64-pin packages and on PD1 on 44,and 32-pins packages.
MCPWMW is mapped on PC7 on 80, 64 and 44-pin packages and on PD0 on 32-pins package.
8. On the chip, each I/O port has 8 pads. Pads that are not bonded to external pins are in input pull-up
configuration after reset. The configuration of these pads must be kept at reset state to avoid added cur-
9. Once the MTC peripheral is ON (bits CKE=1 or DAC=1 in the register MCRA), the pin PC4 is configured
to an alternate function. PC4 is no longer usable as a digital I/O.
69
--
---
PH6
I/O TT
X XX
X
Port H6
70
--
---
PH7
I/O TT
X XX
X
Port H7
71 55
56
37
-
PE0/
OCMP2_B
I/O CT HS X XX
X
Port E0
Timer B Output Compare
2
72 56
1
38
-
PE1/
OCMP1_B
I/O CT
X XX
X
Port E1
Timer B Output Compare
1
73 57
2
39
-
PE2/ICAP2_B
I/O CT
X X
X
Port E2
Timer B Input Capture 2
74 58
3
40
-
PE3/ICAP1_B/ I/O CT
X X
X
Port E3
Timer B Input Capture 1
75 59
-
PE4/
EXTCLK_B
I/O CT
X XX
X
Port E4
Timer B External Clock
source
76 60
-
PE5
I/O CT
X XX
X
Port E5
77 614411
29
VPP/ICCSEL
I
Must be tied low. In the program-
ming mode when available, this pin
acts as the programming voltage in-
put VPP./ ICC mode pin. See section 78 62
5
42
2
30
MCO0 (HS)
O
HS
X
MTC Output Channel 0
79 63
6
43
3
31
MCO1 (HS)
O
HS
X
MTC Output Channel 1
80 64
7
44
4
32
MCO2 (HS)
O
HS
X
MTC Output Channel 2
Table 1. ST7MC Device Pin Description
Pin n°
Pin Name
Type
Level
Port
Main
function
(after
reset)
Alternate function 2)
LQFP80
LQFP64
SDIP56
LQFP44
SDIP32
LQFP32
Input
Output
Input
Output
fl
oat
wp
u
int
ana
OD
PP
1